0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/timer/renesas,ostm.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Renesas OS Timer (OSTM)
0008
0009 maintainers:
0010 - Chris Brandt <chris.brandt@renesas.com>
0011 - Geert Uytterhoeven <geert+renesas@glider.be>
0012
0013 description:
0014 The OSTM is a multi-channel 32-bit timer/counter with fixed clock source that
0015 can operate in either interval count down timer or free-running compare match
0016 mode.
0017
0018 Channels are independent from each other.
0019
0020 properties:
0021 compatible:
0022 items:
0023 - enum:
0024 - renesas,r7s72100-ostm # RZ/A1H
0025 - renesas,r7s9210-ostm # RZ/A2M
0026 - renesas,r9a07g043-ostm # RZ/G2UL
0027 - renesas,r9a07g044-ostm # RZ/G2{L,LC}
0028 - renesas,r9a07g054-ostm # RZ/V2L
0029 - const: renesas,ostm # Generic
0030
0031 reg:
0032 maxItems: 1
0033
0034 interrupts:
0035 maxItems: 1
0036
0037 clocks:
0038 maxItems: 1
0039
0040 power-domains:
0041 maxItems: 1
0042
0043 resets:
0044 maxItems: 1
0045
0046 required:
0047 - compatible
0048 - reg
0049 - interrupts
0050 - clocks
0051 - power-domains
0052
0053 if:
0054 properties:
0055 compatible:
0056 contains:
0057 enum:
0058 - renesas,r9a07g043-ostm
0059 - renesas,r9a07g044-ostm
0060 - renesas,r9a07g054-ostm
0061 then:
0062 required:
0063 - resets
0064
0065 additionalProperties: false
0066
0067 examples:
0068 - |
0069 #include <dt-bindings/clock/r7s72100-clock.h>
0070 #include <dt-bindings/interrupt-controller/arm-gic.h>
0071 ostm0: timer@fcfec000 {
0072 compatible = "renesas,r7s72100-ostm", "renesas,ostm";
0073 reg = <0xfcfec000 0x30>;
0074 interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>;
0075 clocks = <&mstp5_clks R7S72100_CLK_OSTM0>;
0076 power-domains = <&cpg_clocks>;
0077 };
