0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/timer/renesas,cmt.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Renesas Compare Match Timer (CMT)
0008
0009 maintainers:
0010 - Geert Uytterhoeven <geert+renesas@glider.be>
0011 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
0012
0013 description:
0014 The CMT is a multi-channel 16/32/48-bit timer/counter with configurable clock
0015 inputs and programmable compare match.
0016
0017 Channels share hardware resources but their counter and compare match values
0018 are independent. A particular CMT instance can implement only a subset of the
0019 channels supported by the CMT model. Channel indices represent the hardware
0020 position of the channel in the CMT and don't match the channel numbers in the
0021 datasheets.
0022
0023 properties:
0024 compatible:
0025 oneOf:
0026 - items:
0027 - enum:
0028 - renesas,r8a7740-cmt0 # 32-bit CMT0 on R-Mobile A1
0029 - renesas,r8a7740-cmt1 # 48-bit CMT1 on R-Mobile A1
0030 - renesas,r8a7740-cmt2 # 32-bit CMT2 on R-Mobile A1
0031 - renesas,r8a7740-cmt3 # 32-bit CMT3 on R-Mobile A1
0032 - renesas,r8a7740-cmt4 # 32-bit CMT4 on R-Mobile A1
0033 - renesas,sh73a0-cmt0 # 32-bit CMT0 on SH-Mobile AG5
0034 - renesas,sh73a0-cmt1 # 48-bit CMT1 on SH-Mobile AG5
0035 - renesas,sh73a0-cmt2 # 32-bit CMT2 on SH-Mobile AG5
0036 - renesas,sh73a0-cmt3 # 32-bit CMT3 on SH-Mobile AG5
0037 - renesas,sh73a0-cmt4 # 32-bit CMT4 on SH-Mobile AG5
0038
0039 - items:
0040 - enum:
0041 - renesas,r8a73a4-cmt0 # 32-bit CMT0 on R-Mobile APE6
0042 - renesas,r8a7742-cmt0 # 32-bit CMT0 on RZ/G1H
0043 - renesas,r8a7743-cmt0 # 32-bit CMT0 on RZ/G1M
0044 - renesas,r8a7744-cmt0 # 32-bit CMT0 on RZ/G1N
0045 - renesas,r8a7745-cmt0 # 32-bit CMT0 on RZ/G1E
0046 - renesas,r8a77470-cmt0 # 32-bit CMT0 on RZ/G1C
0047 - renesas,r8a7790-cmt0 # 32-bit CMT0 on R-Car H2
0048 - renesas,r8a7791-cmt0 # 32-bit CMT0 on R-Car M2-W
0049 - renesas,r8a7792-cmt0 # 32-bit CMT0 on R-Car V2H
0050 - renesas,r8a7793-cmt0 # 32-bit CMT0 on R-Car M2-N
0051 - renesas,r8a7794-cmt0 # 32-bit CMT0 on R-Car E2
0052 - const: renesas,rcar-gen2-cmt0 # 32-bit CMT0 on R-Mobile APE6, R-Car Gen2 and RZ/G1
0053
0054 - items:
0055 - enum:
0056 - renesas,r8a73a4-cmt1 # 48-bit CMT1 on R-Mobile APE6
0057 - renesas,r8a7742-cmt1 # 48-bit CMT1 on RZ/G1H
0058 - renesas,r8a7743-cmt1 # 48-bit CMT1 on RZ/G1M
0059 - renesas,r8a7744-cmt1 # 48-bit CMT1 on RZ/G1N
0060 - renesas,r8a7745-cmt1 # 48-bit CMT1 on RZ/G1E
0061 - renesas,r8a77470-cmt1 # 48-bit CMT1 on RZ/G1C
0062 - renesas,r8a7790-cmt1 # 48-bit CMT1 on R-Car H2
0063 - renesas,r8a7791-cmt1 # 48-bit CMT1 on R-Car M2-W
0064 - renesas,r8a7792-cmt1 # 48-bit CMT1 on R-Car V2H
0065 - renesas,r8a7793-cmt1 # 48-bit CMT1 on R-Car M2-N
0066 - renesas,r8a7794-cmt1 # 48-bit CMT1 on R-Car E2
0067 - const: renesas,rcar-gen2-cmt1 # 48-bit CMT1 on R-Mobile APE6, R-Car Gen2 and RZ/G1
0068
0069 - items:
0070 - enum:
0071 - renesas,r8a774a1-cmt0 # 32-bit CMT0 on RZ/G2M
0072 - renesas,r8a774b1-cmt0 # 32-bit CMT0 on RZ/G2N
0073 - renesas,r8a774c0-cmt0 # 32-bit CMT0 on RZ/G2E
0074 - renesas,r8a774e1-cmt0 # 32-bit CMT0 on RZ/G2H
0075 - renesas,r8a7795-cmt0 # 32-bit CMT0 on R-Car H3
0076 - renesas,r8a7796-cmt0 # 32-bit CMT0 on R-Car M3-W
0077 - renesas,r8a77961-cmt0 # 32-bit CMT0 on R-Car M3-W+
0078 - renesas,r8a77965-cmt0 # 32-bit CMT0 on R-Car M3-N
0079 - renesas,r8a77970-cmt0 # 32-bit CMT0 on R-Car V3M
0080 - renesas,r8a77980-cmt0 # 32-bit CMT0 on R-Car V3H
0081 - renesas,r8a77990-cmt0 # 32-bit CMT0 on R-Car E3
0082 - renesas,r8a77995-cmt0 # 32-bit CMT0 on R-Car D3
0083 - const: renesas,rcar-gen3-cmt0 # 32-bit CMT0 on R-Car Gen3 and RZ/G2
0084
0085 - items:
0086 - enum:
0087 - renesas,r8a774a1-cmt1 # 48-bit CMT on RZ/G2M
0088 - renesas,r8a774b1-cmt1 # 48-bit CMT on RZ/G2N
0089 - renesas,r8a774c0-cmt1 # 48-bit CMT on RZ/G2E
0090 - renesas,r8a774e1-cmt1 # 48-bit CMT on RZ/G2H
0091 - renesas,r8a7795-cmt1 # 48-bit CMT on R-Car H3
0092 - renesas,r8a7796-cmt1 # 48-bit CMT on R-Car M3-W
0093 - renesas,r8a77961-cmt1 # 48-bit CMT on R-Car M3-W+
0094 - renesas,r8a77965-cmt1 # 48-bit CMT on R-Car M3-N
0095 - renesas,r8a77970-cmt1 # 48-bit CMT on R-Car V3M
0096 - renesas,r8a77980-cmt1 # 48-bit CMT on R-Car V3H
0097 - renesas,r8a77990-cmt1 # 48-bit CMT on R-Car E3
0098 - renesas,r8a77995-cmt1 # 48-bit CMT on R-Car D3
0099 - const: renesas,rcar-gen3-cmt1 # 48-bit CMT on R-Car Gen3 and RZ/G2
0100
0101 - items:
0102 - enum:
0103 - renesas,r8a779a0-cmt0 # 32-bit CMT0 on R-Car V3U
0104 - renesas,r8a779f0-cmt0 # 32-bit CMT0 on R-Car S4-8
0105 - const: renesas,rcar-gen4-cmt0 # 32-bit CMT0 on R-Car Gen4
0106
0107 - items:
0108 - enum:
0109 - renesas,r8a779a0-cmt1 # 48-bit CMT on R-Car V3U
0110 - renesas,r8a779f0-cmt1 # 48-bit CMT on R-Car S4-8
0111 - const: renesas,rcar-gen4-cmt1 # 48-bit CMT on R-Car Gen4
0112
0113 reg:
0114 maxItems: 1
0115
0116 interrupts:
0117 minItems: 1
0118 maxItems: 8
0119
0120 clocks:
0121 maxItems: 1
0122
0123 clock-names:
0124 const: fck
0125
0126 power-domains:
0127 maxItems: 1
0128
0129 resets:
0130 maxItems: 1
0131
0132 required:
0133 - compatible
0134 - reg
0135 - interrupts
0136 - clocks
0137 - clock-names
0138 - power-domains
0139
0140 allOf:
0141 - if:
0142 properties:
0143 compatible:
0144 contains:
0145 enum:
0146 - renesas,rcar-gen2-cmt0
0147 - renesas,rcar-gen3-cmt0
0148 - renesas,rcar-gen4-cmt0
0149 then:
0150 properties:
0151 interrupts:
0152 minItems: 2
0153 maxItems: 2
0154
0155 - if:
0156 properties:
0157 compatible:
0158 contains:
0159 enum:
0160 - renesas,rcar-gen2-cmt1
0161 - renesas,rcar-gen3-cmt1
0162 - renesas,rcar-gen4-cmt1
0163 then:
0164 properties:
0165 interrupts:
0166 minItems: 8
0167 maxItems: 8
0168
0169 additionalProperties: false
0170
0171 examples:
0172 - |
0173 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
0174 #include <dt-bindings/interrupt-controller/arm-gic.h>
0175 #include <dt-bindings/power/r8a7790-sysc.h>
0176 cmt0: timer@ffca0000 {
0177 compatible = "renesas,r8a7790-cmt0", "renesas,rcar-gen2-cmt0";
0178 reg = <0xffca0000 0x1004>;
0179 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
0180 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
0181 clocks = <&cpg CPG_MOD 124>;
0182 clock-names = "fck";
0183 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
0184 resets = <&cpg 124>;
0185 };
0186
0187 cmt1: timer@e6130000 {
0188 compatible = "renesas,r8a7790-cmt1", "renesas,rcar-gen2-cmt1";
0189 reg = <0xe6130000 0x1004>;
0190 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
0191 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
0192 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
0193 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
0194 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
0195 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
0196 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
0197 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
0198 clocks = <&cpg CPG_MOD 329>;
0199 clock-names = "fck";
0200 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
0201 resets = <&cpg 329>;
0202 };
