0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/timer/nxp,tpm-timer.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: NXP Low Power Timer/Pulse Width Modulation Module (TPM)
0008
0009 maintainers:
0010 - Dong Aisheng <aisheng.dong@nxp.com>
0011
0012 description: |
0013 The Timer/PWM Module (TPM) supports input capture, output compare,
0014 and the generation of PWM signals to control electric motor and power
0015 management applications. The counter, compare and capture registers
0016 are clocked by an asynchronous clock that can remain enabled in low
0017 power modes. TPM can support global counter bus where one TPM drives
0018 the counter bus for the others, provided bit width is the same.
0019
0020 properties:
0021 compatible:
0022 oneOf:
0023 - const: fsl,imx7ulp-tpm
0024 - items:
0025 - const: fsl,imx8ulp-tpm
0026 - const: fsl,imx7ulp-tpm
0027
0028 reg:
0029 maxItems: 1
0030
0031 interrupts:
0032 maxItems: 1
0033
0034 clocks:
0035 items:
0036 - description: SoC TPM ipg clock
0037 - description: SoC TPM per clock
0038
0039 clock-names:
0040 items:
0041 - const: ipg
0042 - const: per
0043
0044 required:
0045 - compatible
0046 - reg
0047 - interrupts
0048 - clocks
0049 - clock-names
0050
0051 additionalProperties: false
0052
0053 examples:
0054 - |
0055 #include <dt-bindings/clock/imx7ulp-clock.h>
0056 #include <dt-bindings/interrupt-controller/arm-gic.h>
0057
0058 timer@40260000 {
0059 compatible = "fsl,imx7ulp-tpm";
0060 reg = <0x40260000 0x1000>;
0061 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
0062 clocks = <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>,
0063 <&pcc2 IMX7ULP_CLK_LPTPM5>;
0064 clock-names = "ipg", "per";
0065 };
