0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/timer/arm,arch_timer_mmio.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: ARM memory mapped architected timer
0008
0009 maintainers:
0010 - Marc Zyngier <marc.zyngier@arm.com>
0011 - Mark Rutland <mark.rutland@arm.com>
0012
0013 description: |+
0014 ARM cores may have a memory mapped architected timer, which provides up to 8
0015 frames with a physical and optional virtual timer per frame.
0016
0017 The memory mapped timer is attached to a GIC to deliver its interrupts via SPIs.
0018
0019 properties:
0020 compatible:
0021 items:
0022 - enum:
0023 - arm,armv7-timer-mem
0024
0025 reg:
0026 maxItems: 1
0027 description: The control frame base address
0028
0029 '#address-cells':
0030 enum: [1, 2]
0031
0032 '#size-cells':
0033 const: 1
0034
0035 ranges: true
0036
0037 clock-frequency:
0038 description: The frequency of the main counter, in Hz. Should be present
0039 only where necessary to work around broken firmware which does not configure
0040 CNTFRQ on all CPUs to a uniform correct value. Use of this property is
0041 strongly discouraged; fix your firmware unless absolutely impossible.
0042
0043 always-on:
0044 type: boolean
0045 description: If present, the timer is powered through an always-on power
0046 domain, therefore it never loses context.
0047
0048 arm,cpu-registers-not-fw-configured:
0049 type: boolean
0050 description: Firmware does not initialize any of the generic timer CPU
0051 registers, which contain their architecturally-defined reset values. Only
0052 supported for 32-bit systems which follow the ARMv7 architected reset
0053 values.
0054
0055 arm,no-tick-in-suspend:
0056 type: boolean
0057 description: The main counter does not tick when the system is in
0058 low-power system suspend on some SoCs. This behavior does not match the
0059 Architecture Reference Manual's specification that the system counter "must
0060 be implemented in an always-on power domain."
0061
0062 patternProperties:
0063 '^frame@[0-9a-z]*$':
0064 type: object
0065 description: A timer node has up to 8 frame sub-nodes, each with the following properties.
0066 properties:
0067 frame-number:
0068 $ref: "/schemas/types.yaml#/definitions/uint32"
0069 minimum: 0
0070 maximum: 7
0071
0072 interrupts:
0073 minItems: 1
0074 items:
0075 - description: physical timer irq
0076 - description: virtual timer irq
0077
0078 reg:
0079 minItems: 1
0080 items:
0081 - description: 1st view base address
0082 - description: 2nd optional view base address
0083
0084 required:
0085 - frame-number
0086 - interrupts
0087 - reg
0088
0089 required:
0090 - compatible
0091 - reg
0092 - '#address-cells'
0093 - '#size-cells'
0094
0095 additionalProperties: false
0096
0097 examples:
0098 - |
0099 timer@f0000000 {
0100 compatible = "arm,armv7-timer-mem";
0101 #address-cells = <1>;
0102 #size-cells = <1>;
0103 ranges = <0 0xf0001000 0x1000>;
0104 reg = <0xf0000000 0x1000>;
0105 clock-frequency = <50000000>;
0106
0107 frame@0 {
0108 frame-number = <0>;
0109 interrupts = <0 13 0x8>,
0110 <0 14 0x8>;
0111 reg = <0x0000 0x1000>,
0112 <0x1000 0x1000>;
0113 };
0114
0115 frame@2000 {
0116 frame-number = <1>;
0117 interrupts = <0 15 0x8>;
0118 reg = <0x2000 0x1000>;
0119 };
0120 };
0121
0122 ...
