0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 # Copyright 2020 Linaro Ltd.
0003 %YAML 1.2
0004 ---
0005 $id: http://devicetree.org/schemas/thermal/thermal-idle.yaml#
0006 $schema: http://devicetree.org/meta-schemas/core.yaml#
0007
0008 title: Thermal idle cooling device binding
0009
0010 maintainers:
0011 - Daniel Lezcano <daniel.lezcano@linaro.org>
0012
0013 description: |
0014 The thermal idle cooling device allows the system to passively
0015 mitigate the temperature on the device by injecting idle cycles,
0016 forcing it to cool down.
0017
0018 This binding describes the thermal idle node.
0019
0020 properties:
0021 $nodename:
0022 const: thermal-idle
0023 description: |
0024 A thermal-idle node describes the idle cooling device properties to
0025 cool down efficiently the attached thermal zone.
0026
0027 '#cooling-cells':
0028 const: 2
0029 description: |
0030 Must be 2, in order to specify minimum and maximum cooling state used in
0031 the cooling-maps reference. The first cell is the minimum cooling state
0032 and the second cell is the maximum cooling state requested.
0033
0034 duration-us:
0035 description: |
0036 The idle duration in microsecond the device should cool down.
0037
0038 exit-latency-us:
0039 description: |
0040 The exit latency constraint in microsecond for the injected idle state
0041 for the device. It is the latency constraint to apply when selecting an
0042 idle state from among all the present ones.
0043
0044 required:
0045 - '#cooling-cells'
0046
0047 additionalProperties: false
0048
0049 examples:
0050 - |
0051 #include <dt-bindings/thermal/thermal.h>
0052
0053 // Example: Combining idle cooling device on big CPUs with cpufreq cooling device
0054 cpus {
0055 #address-cells = <2>;
0056 #size-cells = <0>;
0057
0058 /* ... */
0059
0060 cpu_b0: cpu@100 {
0061 device_type = "cpu";
0062 compatible = "arm,cortex-a72";
0063 reg = <0x0 0x100>;
0064 enable-method = "psci";
0065 capacity-dmips-mhz = <1024>;
0066 dynamic-power-coefficient = <436>;
0067 #cooling-cells = <2>; /* min followed by max */
0068 cpu-idle-states = <&CPU_SLEEP>, <&CLUSTER_SLEEP>;
0069 thermal-idle {
0070 #cooling-cells = <2>;
0071 duration-us = <10000>;
0072 exit-latency-us = <500>;
0073 };
0074 };
0075
0076 cpu_b1: cpu@101 {
0077 device_type = "cpu";
0078 compatible = "arm,cortex-a72";
0079 reg = <0x0 0x101>;
0080 enable-method = "psci";
0081 capacity-dmips-mhz = <1024>;
0082 dynamic-power-coefficient = <436>;
0083 #cooling-cells = <2>; /* min followed by max */
0084 cpu-idle-states = <&CPU_SLEEP>, <&CLUSTER_SLEEP>;
0085 thermal-idle {
0086 #cooling-cells = <2>;
0087 duration-us = <10000>;
0088 exit-latency-us = <500>;
0089 };
0090 };
0091
0092 /* ... */
0093
0094 };
0095
0096 /* ... */
0097
0098 thermal_zones {
0099 cpu_thermal: cpu {
0100 polling-delay-passive = <100>;
0101 polling-delay = <1000>;
0102
0103 /* ... */
0104
0105 trips {
0106 cpu_alert0: cpu_alert0 {
0107 temperature = <65000>;
0108 hysteresis = <2000>;
0109 type = "passive";
0110 };
0111
0112 cpu_alert1: cpu_alert1 {
0113 temperature = <70000>;
0114 hysteresis = <2000>;
0115 type = "passive";
0116 };
0117
0118 cpu_alert2: cpu_alert2 {
0119 temperature = <75000>;
0120 hysteresis = <2000>;
0121 type = "passive";
0122 };
0123
0124 cpu_crit: cpu_crit {
0125 temperature = <95000>;
0126 hysteresis = <2000>;
0127 type = "critical";
0128 };
0129 };
0130
0131 cooling-maps {
0132 map0 {
0133 trip = <&cpu_alert1>;
0134 cooling-device = <&{/cpus/cpu@100/thermal-idle} 0 15 >,
0135 <&{/cpus/cpu@101/thermal-idle} 0 15>;
0136 };
0137
0138 map1 {
0139 trip = <&cpu_alert2>;
0140 cooling-device =
0141 <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
0142 <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
0143 };
0144 };
0145 };
0146 };
