0001 # SPDX-License-Identifier: GPL-2.0-only
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/thermal/rockchip-thermal.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Temperature Sensor ADC (TSADC) on Rockchip SoCs
0008
0009 maintainers:
0010 - Heiko Stuebner <heiko@sntech.de>
0011
0012 properties:
0013 compatible:
0014 enum:
0015 - rockchip,px30-tsadc
0016 - rockchip,rk3228-tsadc
0017 - rockchip,rk3288-tsadc
0018 - rockchip,rk3328-tsadc
0019 - rockchip,rk3368-tsadc
0020 - rockchip,rk3399-tsadc
0021 - rockchip,rk3568-tsadc
0022 - rockchip,rv1108-tsadc
0023
0024 reg:
0025 maxItems: 1
0026
0027 interrupts:
0028 maxItems: 1
0029
0030 clocks:
0031 minItems: 2
0032 maxItems: 2
0033
0034 clock-names:
0035 items:
0036 - const: tsadc
0037 - const: apb_pclk
0038
0039 resets:
0040 minItems: 1
0041 maxItems: 3
0042
0043 reset-names:
0044 minItems: 1
0045 items:
0046 - const: tsadc-apb
0047 - const: tsadc
0048 - const: tsadc-phy
0049
0050 "#thermal-sensor-cells":
0051 const: 1
0052
0053 rockchip,grf:
0054 description: The phandle of the syscon node for the general register file.
0055 $ref: /schemas/types.yaml#/definitions/phandle
0056
0057 rockchip,hw-tshut-temp:
0058 description: The hardware-controlled shutdown temperature value.
0059 $ref: /schemas/types.yaml#/definitions/uint32
0060
0061 rockchip,hw-tshut-mode:
0062 description: The hardware-controlled shutdown mode 0:CRU 1:GPIO.
0063 $ref: /schemas/types.yaml#/definitions/uint32
0064 enum: [0, 1]
0065
0066 rockchip,hw-tshut-polarity:
0067 description: The hardware-controlled active polarity 0:LOW 1:HIGH.
0068 $ref: /schemas/types.yaml#/definitions/uint32
0069 enum: [0, 1]
0070
0071 required:
0072 - compatible
0073 - reg
0074 - interrupts
0075 - clocks
0076 - clock-names
0077 - resets
0078 - "#thermal-sensor-cells"
0079
0080 additionalProperties: false
0081
0082 examples:
0083 - |
0084 #include <dt-bindings/interrupt-controller/arm-gic.h>
0085 #include <dt-bindings/clock/rk3288-cru.h>
0086
0087 tsadc: tsadc@ff280000 {
0088 compatible = "rockchip,rk3288-tsadc";
0089 reg = <0xff280000 0x100>;
0090 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
0091 clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
0092 clock-names = "tsadc", "apb_pclk";
0093 resets = <&cru SRST_TSADC>;
0094 reset-names = "tsadc-apb";
0095 #thermal-sensor-cells = <1>;
0096 rockchip,hw-tshut-temp = <95000>;
0097 rockchip,hw-tshut-mode = <0>;
0098 rockchip,hw-tshut-polarity = <0>;
0099 };
