0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 # Copyright 2021 Linaro Ltd.
0003 %YAML 1.2
0004 ---
0005 $id: http://devicetree.org/schemas/thermal/qcom-lmh.yaml#
0006 $schema: http://devicetree.org/meta-schemas/core.yaml#
0007
0008 title: Qualcomm Limits Management Hardware(LMh)
0009
0010 maintainers:
0011 - Thara Gopinath <thara.gopinath@linaro.org>
0012
0013 description:
0014 Limits Management Hardware(LMh) is a hardware infrastructure on some
0015 Qualcomm SoCs that can enforce temperature and current limits as
0016 programmed by software for certain IPs like CPU.
0017
0018 properties:
0019 compatible:
0020 enum:
0021 - qcom,sc8180x-lmh
0022 - qcom,sdm845-lmh
0023 - qcom,sm8150-lmh
0024
0025 reg:
0026 items:
0027 - description: core registers
0028
0029 interrupts:
0030 maxItems: 1
0031
0032 '#interrupt-cells':
0033 const: 1
0034
0035 interrupt-controller: true
0036
0037 cpus:
0038 description:
0039 phandle of the first cpu in the LMh cluster
0040 $ref: /schemas/types.yaml#/definitions/phandle
0041
0042 qcom,lmh-temp-arm-millicelsius:
0043 description:
0044 An integer expressing temperature threshold at which the LMh thermal
0045 FSM is engaged.
0046
0047 qcom,lmh-temp-low-millicelsius:
0048 description:
0049 An integer expressing temperature threshold at which the state machine
0050 will attempt to remove frequency throttling.
0051
0052 qcom,lmh-temp-high-millicelsius:
0053 description:
0054 An integer expressing temperature threshold at which the state machine
0055 will attempt to throttle the frequency.
0056
0057 required:
0058 - compatible
0059 - reg
0060 - interrupts
0061 - '#interrupt-cells'
0062 - interrupt-controller
0063 - cpus
0064 - qcom,lmh-temp-arm-millicelsius
0065 - qcom,lmh-temp-low-millicelsius
0066 - qcom,lmh-temp-high-millicelsius
0067
0068 additionalProperties: false
0069
0070 examples:
0071 - |
0072 #include <dt-bindings/interrupt-controller/arm-gic.h>
0073
0074 lmh@17d70800 {
0075 compatible = "qcom,sdm845-lmh";
0076 reg = <0x17d70800 0x400>;
0077 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
0078 cpus = <&CPU4>;
0079 qcom,lmh-temp-arm-millicelsius = <65000>;
0080 qcom,lmh-temp-low-millicelsius = <94500>;
0081 qcom,lmh-temp-high-millicelsius = <95000>;
0082 interrupt-controller;
0083 #interrupt-cells = <1>;
0084 };
