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0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/spi/st,stm32-spi.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: STMicroelectronics STM32 SPI Controller bindings
0008 
0009 description: |
0010   The STM32 SPI controller is used to communicate with external devices using
0011   the Serial Peripheral Interface. It supports full-duplex, half-duplex and
0012   simplex synchronous serial communication with external devices. It supports
0013   from 4 to 32-bit data size.
0014 
0015 maintainers:
0016   - Erwan Leray <erwan.leray@foss.st.com>
0017   - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
0018 
0019 allOf:
0020   - $ref: "spi-controller.yaml#"
0021   - if:
0022       properties:
0023         compatible:
0024           contains:
0025             const: st,stm32f4-spi
0026 
0027     then:
0028       properties:
0029         st,spi-midi-ns: false
0030 
0031 properties:
0032   compatible:
0033     enum:
0034       - st,stm32f4-spi
0035       - st,stm32h7-spi
0036 
0037   reg:
0038     maxItems: 1
0039 
0040   clocks:
0041     maxItems: 1
0042 
0043   interrupts:
0044     maxItems: 1
0045 
0046   resets:
0047     maxItems: 1
0048 
0049   dmas:
0050     description: |
0051       DMA specifiers for tx and rx dma. DMA fifo mode must be used. See
0052       the STM32 DMA bindings Documentation/devicetree/bindings/dma/st,stm32-dma.yaml.
0053     items:
0054       - description: rx DMA channel
0055       - description: tx DMA channel
0056 
0057   dma-names:
0058     items:
0059       - const: rx
0060       - const: tx
0061 
0062 patternProperties:
0063   "^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-f]+$":
0064     type: object
0065     # SPI slave nodes must be children of the SPI master node and can
0066     # contain the following properties.
0067     properties:
0068       st,spi-midi-ns:
0069         description: |
0070           Only for STM32H7, (Master Inter-Data Idleness) minimum time
0071           delay in nanoseconds inserted between two consecutive data frames.
0072 
0073 required:
0074   - compatible
0075   - reg
0076   - clocks
0077   - interrupts
0078 
0079 unevaluatedProperties: false
0080 
0081 examples:
0082   - |
0083     #include <dt-bindings/interrupt-controller/arm-gic.h>
0084     #include <dt-bindings/clock/stm32mp1-clks.h>
0085     #include <dt-bindings/reset/stm32mp1-resets.h>
0086     spi@4000b000 {
0087       #address-cells = <1>;
0088       #size-cells = <0>;
0089       compatible = "st,stm32h7-spi";
0090       reg = <0x4000b000 0x400>;
0091       interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
0092       clocks = <&rcc SPI2_K>;
0093       resets = <&rcc SPI2_R>;
0094       dmas = <&dmamux1 0 39 0x400 0x05>,
0095              <&dmamux1 1 40 0x400 0x05>;
0096       dma-names = "rx", "tx";
0097       cs-gpios = <&gpioa 11 0>;
0098 
0099     };
0100 
0101 ...