0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Peripheral-specific properties for a SPI bus.
0008
0009 description:
0010 Many SPI controllers need to add properties to peripheral devices. They could
0011 be common properties like spi-max-frequency, spi-cpha, etc. or they could be
0012 controller specific like delay in clock or data lines, etc. These properties
0013 need to be defined in the peripheral node because they are per-peripheral and
0014 there can be multiple peripherals attached to a controller. All those
0015 properties are listed here. The controller specific properties should go in
0016 their own separate schema that should be referenced from here.
0017
0018 maintainers:
0019 - Mark Brown <broonie@kernel.org>
0020
0021 properties:
0022 reg:
0023 minItems: 1
0024 maxItems: 256
0025 items:
0026 items:
0027 - minimum: 0
0028 maximum: 256
0029 description:
0030 Chip select used by the device.
0031
0032 spi-3wire:
0033 $ref: /schemas/types.yaml#/definitions/flag
0034 description:
0035 The device requires 3-wire mode.
0036
0037 spi-cs-high:
0038 $ref: /schemas/types.yaml#/definitions/flag
0039 description:
0040 The device requires the chip select active high.
0041
0042 spi-lsb-first:
0043 $ref: /schemas/types.yaml#/definitions/flag
0044 description:
0045 The device requires the LSB first mode.
0046
0047 spi-max-frequency:
0048 $ref: /schemas/types.yaml#/definitions/uint32
0049 description:
0050 Maximum SPI clocking speed of the device in Hz.
0051
0052 spi-rx-bus-width:
0053 description:
0054 Bus width to the SPI bus used for read transfers.
0055 If 0 is provided, then no RX will be possible on this device.
0056 $ref: /schemas/types.yaml#/definitions/uint32
0057 enum: [0, 1, 2, 4, 8]
0058 default: 1
0059
0060 spi-rx-delay-us:
0061 description:
0062 Delay, in microseconds, after a read transfer.
0063
0064 rx-sample-delay-ns:
0065 description: SPI Rx sample delay offset, unit is nanoseconds.
0066 The delay from the default sample time before the actual
0067 sample of the rxd input signal occurs.
0068
0069 spi-tx-bus-width:
0070 description:
0071 Bus width to the SPI bus used for write transfers.
0072 If 0 is provided, then no TX will be possible on this device.
0073 $ref: /schemas/types.yaml#/definitions/uint32
0074 enum: [0, 1, 2, 4, 8]
0075 default: 1
0076
0077 spi-tx-delay-us:
0078 description:
0079 Delay, in microseconds, after a write transfer.
0080
0081 stacked-memories:
0082 description: Several SPI memories can be wired in stacked mode.
0083 This basically means that either a device features several chip
0084 selects, or that different devices must be seen as a single
0085 bigger chip. This basically doubles (or more) the total address
0086 space with only a single additional wire, while still needing
0087 to repeat the commands when crossing a chip boundary. The size of
0088 each chip should be provided as members of the array.
0089 $ref: /schemas/types.yaml#/definitions/uint64-array
0090 minItems: 2
0091 maxItems: 4
0092
0093 parallel-memories:
0094 description: Several SPI memories can be wired in parallel mode.
0095 The devices are physically on a different buses but will always
0096 act synchronously as each data word is spread across the
0097 different memories (eg. even bits are stored in one memory, odd
0098 bits in the other). This basically doubles the address space and
0099 the throughput while greatly complexifying the wiring because as
0100 many busses as devices must be wired. The size of each chip should
0101 be provided as members of the array.
0102 $ref: /schemas/types.yaml#/definitions/uint64-array
0103 minItems: 2
0104 maxItems: 4
0105
0106 # The controller specific properties go here.
0107 allOf:
0108 - $ref: cdns,qspi-nor-peripheral-props.yaml#
0109 - $ref: samsung,spi-peripheral-props.yaml#
0110 - $ref: nvidia,tegra210-quad-peripheral-props.yaml#
0111
0112 additionalProperties: true
