0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Freescale Low Power SPI (LPSPI) for i.MX
0008
0009 maintainers:
0010 - Anson Huang <Anson.Huang@nxp.com>
0011
0012 allOf:
0013 - $ref: "/schemas/spi/spi-controller.yaml#"
0014
0015 properties:
0016 compatible:
0017 oneOf:
0018 - enum:
0019 - fsl,imx7ulp-spi
0020 - fsl,imx8qxp-spi
0021 - items:
0022 - const: fsl,imx8ulp-spi
0023 - const: fsl,imx7ulp-spi
0024 reg:
0025 maxItems: 1
0026
0027 interrupts:
0028 maxItems: 1
0029
0030 clocks:
0031 items:
0032 - description: SoC SPI per clock
0033 - description: SoC SPI ipg clock
0034
0035 clock-names:
0036 items:
0037 - const: per
0038 - const: ipg
0039
0040 fsl,spi-only-use-cs1-sel:
0041 description:
0042 spi common code does not support use of CS signals discontinuously.
0043 i.MX8DXL-EVK board only uses CS1 without using CS0. Therefore, add
0044 this property to re-config the chipselect value in the LPSPI driver.
0045 type: boolean
0046
0047 required:
0048 - compatible
0049 - reg
0050 - interrupts
0051 - clocks
0052 - clock-names
0053
0054 unevaluatedProperties: false
0055
0056 examples:
0057 - |
0058 #include <dt-bindings/clock/imx7ulp-clock.h>
0059 #include <dt-bindings/interrupt-controller/arm-gic.h>
0060
0061 spi@40290000 {
0062 compatible = "fsl,imx7ulp-spi";
0063 reg = <0x40290000 0x10000>;
0064 interrupt-parent = <&intc>;
0065 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
0066 clocks = <&clks IMX7ULP_CLK_LPSPI2>,
0067 <&clks IMX7ULP_CLK_DUMMY>;
0068 clock-names = "per", "ipg";
0069 spi-slave;
0070 fsl,spi-only-use-cs1-sel;
0071 };
