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OSCL-LXR

 
 

    


0001 ARM Freescale DSPI controller
0002 
0003 Required properties:
0004 - compatible : must be one of:
0005         "fsl,vf610-dspi",
0006         "fsl,ls1021a-v1.0-dspi",
0007         "fsl,ls1012a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
0008         "fsl,ls1028a-dspi",
0009         "fsl,ls1043a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
0010         "fsl,ls1046a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
0011         "fsl,ls1088a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
0012         "fsl,ls2080a-dspi" (optionally followed by "fsl,ls2085a-dspi"),
0013         "fsl,ls2085a-dspi",
0014         "fsl,lx2160a-dspi",
0015 - reg : Offset and length of the register set for the device
0016 - interrupts : Should contain SPI controller interrupt
0017 - clocks: from common clock binding: handle to dspi clock.
0018 - clock-names: from common clock binding: Shall be "dspi".
0019 - pinctrl-0: pin control group to be used for this controller.
0020 - pinctrl-names: must contain a "default" entry.
0021 - spi-num-chipselects : the number of the chipselect signals.
0022 
0023 Optional property:
0024 - big-endian: If present the dspi device's registers are implemented
0025   in big endian mode.
0026 - bus-num : the slave chip chipselect signal number.
0027 
0028 Optional SPI slave node properties:
0029 - fsl,spi-cs-sck-delay: a delay in nanoseconds between activating chip
0030   select and the start of clock signal, at the start of a transfer.
0031 - fsl,spi-sck-cs-delay: a delay in nanoseconds between stopping the clock
0032   signal and deactivating chip select, at the end of a transfer.
0033 
0034 Example:
0035 
0036 dspi0@4002c000 {
0037         #address-cells = <1>;
0038         #size-cells = <0>;
0039         compatible = "fsl,vf610-dspi";
0040         reg = <0x4002c000 0x1000>;
0041         interrupts = <0 67 0x04>;
0042         clocks = <&clks VF610_CLK_DSPI0>;
0043         clock-names = "dspi";
0044         spi-num-chipselects = <5>;
0045         bus-num = <0>;
0046         pinctrl-names = "default";
0047         pinctrl-0 = <&pinctrl_dspi0_1>;
0048         big-endian;
0049 
0050         sflash: at26df081a@0 {
0051                 #address-cells = <1>;
0052                 #size-cells = <1>;
0053                 compatible = "atmel,at26df081a";
0054                 spi-max-frequency = <16000000>;
0055                 spi-cpol;
0056                 spi-cpha;
0057                 reg = <0>;
0058                 linux,modalias = "m25p80";
0059                 modal = "at26df081a";
0060                 fsl,spi-cs-sck-delay = <100>;
0061                 fsl,spi-sck-cs-delay = <50>;
0062         };
0063 };
0064 
0065