0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: SPI Controller Generic Binding
0008
0009 maintainers:
0010 - Mark Brown <broonie@kernel.org>
0011
0012 description: |
0013 SPI busses can be described with a node for the SPI controller device
0014 and a set of child nodes for each SPI slave on the bus. The system SPI
0015 controller may be described for use in SPI master mode or in SPI slave mode,
0016 but not for both at the same time.
0017
0018 properties:
0019 $nodename:
0020 pattern: "^spi(@.*|-[0-9a-f])*$"
0021
0022 "#address-cells":
0023 enum: [0, 1]
0024
0025 "#size-cells":
0026 const: 0
0027
0028 cs-gpios:
0029 description: |
0030 GPIOs used as chip selects.
0031 If that property is used, the number of chip selects will be
0032 increased automatically with max(cs-gpios, hardware chip selects).
0033
0034 So if, for example, the controller has 4 CS lines, and the
0035 cs-gpios looks like this
0036 cs-gpios = <&gpio1 0 0>, <0>, <&gpio1 1 0>, <&gpio1 2 0>;
0037
0038 Then it should be configured so that num_chipselect = 4, with
0039 the following mapping
0040 cs0 : &gpio1 0 0
0041 cs1 : native
0042 cs2 : &gpio1 1 0
0043 cs3 : &gpio1 2 0
0044
0045 The second flag of a gpio descriptor can be GPIO_ACTIVE_HIGH (0)
0046 or GPIO_ACTIVE_LOW(1). Legacy device trees often use 0.
0047
0048 There is a special rule set for combining the second flag of an
0049 cs-gpio with the optional spi-cs-high flag for SPI slaves.
0050
0051 Each table entry defines how the CS pin is to be physically
0052 driven (not considering potential gpio inversions by pinmux):
0053
0054 device node | cs-gpio | CS pin state active | Note
0055 ================+===============+=====================+=====
0056 spi-cs-high | - | H |
0057 - | - | L |
0058 spi-cs-high | ACTIVE_HIGH | H |
0059 - | ACTIVE_HIGH | L | 1
0060 spi-cs-high | ACTIVE_LOW | H | 2
0061 - | ACTIVE_LOW | L |
0062
0063 Notes:
0064 1) Should print a warning about polarity inversion.
0065 Here it would be wise to avoid and define the gpio as
0066 ACTIVE_LOW.
0067 2) Should print a warning about polarity inversion
0068 because ACTIVE_LOW is overridden by spi-cs-high.
0069 Should be generally avoided and be replaced by
0070 spi-cs-high + ACTIVE_HIGH.
0071
0072 num-cs:
0073 $ref: /schemas/types.yaml#/definitions/uint32
0074 description:
0075 Total number of chip selects.
0076
0077 spi-slave:
0078 $ref: /schemas/types.yaml#/definitions/flag
0079 description:
0080 The SPI controller acts as a slave, instead of a master.
0081
0082 slave:
0083 type: object
0084
0085 properties:
0086 compatible:
0087 description:
0088 Compatible of the SPI device.
0089
0090 required:
0091 - compatible
0092
0093 patternProperties:
0094 "^.*@[0-9a-f]+$":
0095 type: object
0096 $ref: spi-peripheral-props.yaml
0097
0098 properties:
0099 spi-cpha:
0100 $ref: /schemas/types.yaml#/definitions/flag
0101 description:
0102 The device requires shifted clock phase (CPHA) mode.
0103
0104 spi-cpol:
0105 $ref: /schemas/types.yaml#/definitions/flag
0106 description:
0107 The device requires inverse clock polarity (CPOL) mode.
0108
0109 required:
0110 - compatible
0111 - reg
0112
0113 allOf:
0114 - if:
0115 not:
0116 required:
0117 - spi-slave
0118 then:
0119 properties:
0120 "#address-cells":
0121 const: 1
0122 else:
0123 properties:
0124 "#address-cells":
0125 const: 0
0126
0127 additionalProperties: true
0128
0129 examples:
0130 - |
0131 spi@80010000 {
0132 #address-cells = <1>;
0133 #size-cells = <0>;
0134 compatible = "fsl,imx28-spi";
0135 reg = <0x80010000 0x2000>;
0136 interrupts = <96>;
0137 dmas = <&dma_apbh 0>;
0138 dma-names = "rx-tx";
0139
0140 display@0 {
0141 compatible = "lg,lg4573";
0142 spi-max-frequency = <1000000>;
0143 reg = <0>;
0144 };
0145
0146 sensor@1 {
0147 compatible = "bosch,bme680";
0148 spi-max-frequency = <100000>;
0149 reg = <1>;
0150 };
0151
0152 flash@2 {
0153 compatible = "jedec,spi-nor";
0154 spi-max-frequency = <50000000>;
0155 reg = <2>, <3>;
0156 stacked-memories = /bits/ 64 <0x10000000 0x10000000>;
0157 };
0158 };
