0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/spi/samsung,spi.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Samsung S3C/S5P/Exynos SoC SPI controller
0008
0009 maintainers:
0010 - Krzysztof Kozlowski <krzk@kernel.org>
0011
0012 description:
0013 All the SPI controller nodes should be represented in the aliases node using
0014 the following format 'spi{n}' where n is a unique number for the alias.
0015
0016 properties:
0017 compatible:
0018 oneOf:
0019 - enum:
0020 - samsung,s3c2443-spi # for S3C2443, S3C2416 and S3C2450
0021 - samsung,s3c6410-spi
0022 - samsung,s5pv210-spi # for S5PV210 and S5PC110
0023 - samsung,exynos4210-spi
0024 - samsung,exynos5433-spi
0025 - samsung,exynosautov9-spi
0026 - tesla,fsd-spi
0027 - const: samsung,exynos7-spi
0028 deprecated: true
0029
0030 clocks:
0031 minItems: 2
0032 maxItems: 3
0033
0034 clock-names:
0035 minItems: 2
0036 maxItems: 3
0037
0038 cs-gpios: true
0039
0040 dmas:
0041 minItems: 2
0042 maxItems: 2
0043
0044 dma-names:
0045 items:
0046 - const: tx
0047 - const: rx
0048
0049 interrupts:
0050 maxItems: 1
0051
0052 no-cs-readback:
0053 description:
0054 The CS line is disconnected, therefore the device should not operate
0055 based on CS signalling.
0056 type: boolean
0057
0058 num-cs:
0059 minimum: 1
0060 maximum: 4
0061 default: 1
0062
0063 samsung,spi-src-clk:
0064 description:
0065 If the spi controller includes a internal clock mux to select the clock
0066 source for the spi bus clock, this property can be used to indicate the
0067 clock to be used for driving the spi bus clock. If not specified, the
0068 clock number 0 is used as default.
0069 $ref: /schemas/types.yaml#/definitions/uint32
0070 default: 0
0071
0072 reg:
0073 maxItems: 1
0074
0075 required:
0076 - compatible
0077 - clocks
0078 - clock-names
0079 - dmas
0080 - dma-names
0081 - interrupts
0082 - reg
0083
0084 allOf:
0085 - $ref: spi-controller.yaml#
0086 - if:
0087 properties:
0088 compatible:
0089 contains:
0090 enum:
0091 - samsung,exynos5433-spi
0092 - samsung,exynosautov9-spi
0093 then:
0094 properties:
0095 clocks:
0096 minItems: 3
0097 maxItems: 3
0098 clock-names:
0099 items:
0100 - const: spi
0101 - enum:
0102 - spi_busclk0
0103 - spi_busclk1
0104 - spi_busclk2
0105 - spi_busclk3
0106 - const: spi_ioclk
0107 else:
0108 properties:
0109 clocks:
0110 minItems: 2
0111 maxItems: 2
0112 clock-names:
0113 items:
0114 - const: spi
0115 - enum:
0116 - spi_busclk0
0117 - spi_busclk1
0118 - spi_busclk2
0119 - spi_busclk3
0120
0121 unevaluatedProperties: false
0122
0123 examples:
0124 - |
0125 #include <dt-bindings/clock/exynos5433.h>
0126 #include <dt-bindings/clock/samsung,s2mps11.h>
0127 #include <dt-bindings/interrupt-controller/arm-gic.h>
0128 #include <dt-bindings/gpio/gpio.h>
0129
0130 spi@14d30000 {
0131 compatible = "samsung,exynos5433-spi";
0132 reg = <0x14d30000 0x100>;
0133 interrupts = <GIC_SPI 433 IRQ_TYPE_LEVEL_HIGH>;
0134 dmas = <&pdma0 11>, <&pdma0 10>;
0135 dma-names = "tx", "rx";
0136 #address-cells = <1>;
0137 #size-cells = <0>;
0138 clocks = <&cmu_peric CLK_PCLK_SPI1>,
0139 <&cmu_peric CLK_SCLK_SPI1>,
0140 <&cmu_peric CLK_SCLK_IOCLK_SPI1>;
0141 clock-names = "spi",
0142 "spi_busclk0",
0143 "spi_ioclk";
0144 samsung,spi-src-clk = <0>;
0145 pinctrl-names = "default";
0146 pinctrl-0 = <&spi1_bus>;
0147 num-cs = <1>;
0148
0149 cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
0150
0151 audio-codec@0 {
0152 compatible = "wlf,wm5110";
0153 reg = <0x0>;
0154 spi-max-frequency = <20000000>;
0155 interrupt-parent = <&gpa0>;
0156 interrupts = <4 IRQ_TYPE_NONE>;
0157 clocks = <&pmu_system_controller 0>,
0158 <&s2mps13_osc S2MPS11_CLK_BT>;
0159 clock-names = "mclk1", "mclk2";
0160
0161 gpio-controller;
0162 #gpio-cells = <2>;
0163 interrupt-controller;
0164 #interrupt-cells = <2>;
0165
0166 wlf,micd-detect-debounce = <300>;
0167 wlf,micd-bias-start-time = <0x1>;
0168 wlf,micd-rate = <0x7>;
0169 wlf,micd-dbtime = <0x2>;
0170 wlf,micd-force-micbias;
0171 wlf,micd-configs = <0x0 1 0>;
0172 wlf,hpdet-channel = <1>;
0173 wlf,gpsw = <0x1>;
0174 wlf,inmode = <2 0 2 0>;
0175
0176 wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
0177 wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
0178
0179 /* core supplies */
0180 AVDD-supply = <&ldo18_reg>;
0181 DBVDD1-supply = <&ldo18_reg>;
0182 CPVDD-supply = <&ldo18_reg>;
0183 DBVDD2-supply = <&ldo18_reg>;
0184 DBVDD3-supply = <&ldo18_reg>;
0185 SPKVDDL-supply = <&ldo18_reg>;
0186 SPKVDDR-supply = <&ldo18_reg>;
0187
0188 controller-data {
0189 samsung,spi-feedback-delay = <0>;
0190 };
0191 };
0192 };
