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0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/spi/qcom,spi-qup.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI)
0008 
0009 maintainers:
0010   - Andy Gross <agross@kernel.org>
0011   - Bjorn Andersson <bjorn.andersson@linaro.org>
0012   - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
0013 
0014 description:
0015   The QUP core is an AHB slave that provides a common data path (an output FIFO
0016   and an input FIFO) for serial peripheral interface (SPI) mini-core.
0017 
0018   SPI in master mode supports up to 50MHz, up to four chip selects,
0019   programmable data path from 4 bits to 32 bits and numerous protocol variants.
0020 
0021 allOf:
0022   - $ref: /schemas/spi/spi-controller.yaml#
0023 
0024 properties:
0025   compatible:
0026     enum:
0027       - qcom,spi-qup-v1.1.1 # for 8660, 8960 and 8064
0028       - qcom,spi-qup-v2.1.1 # for 8974 and later
0029       - qcom,spi-qup-v2.2.1 # for 8974 v2 and later
0030 
0031   clocks:
0032     maxItems: 2
0033 
0034   clock-names:
0035     items:
0036       - const: core
0037       - const: iface
0038 
0039   dmas:
0040     maxItems: 2
0041 
0042   dma-names:
0043     items:
0044       - const: tx
0045       - const: rx
0046 
0047   interrupts:
0048     maxItems: 1
0049 
0050   reg:
0051     maxItems: 1
0052 
0053 required:
0054   - compatible
0055   - clocks
0056   - clock-names
0057   - interrupts
0058   - reg
0059 
0060 unevaluatedProperties: false
0061 
0062 examples:
0063   - |
0064     #include <dt-bindings/clock/qcom,gcc-msm8996.h>
0065     #include <dt-bindings/interrupt-controller/arm-gic.h>
0066 
0067     spi@7575000 {
0068         compatible = "qcom,spi-qup-v2.2.1";
0069         reg = <0x07575000 0x600>;
0070         interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
0071         clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
0072                  <&gcc GCC_BLSP1_AHB_CLK>;
0073         clock-names = "core", "iface";
0074         pinctrl-names = "default", "sleep";
0075         pinctrl-0 = <&blsp1_spi1_default>;
0076         pinctrl-1 = <&blsp1_spi1_sleep>;
0077         dmas = <&blsp1_dma 12>, <&blsp1_dma 13>;
0078         dma-names = "tx", "rx";
0079         #address-cells = <1>;
0080         #size-cells = <0>;
0081     };