Back to home page

OSCL-LXR

 
 

    


0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/spi/nvidia,tegra210-quad.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: Tegra Quad SPI Controller
0008 
0009 maintainers:
0010   - Thierry Reding <thierry.reding@gmail.com>
0011   - Jonathan Hunter <jonathanh@nvidia.com>
0012 
0013 allOf:
0014   - $ref: "spi-controller.yaml#"
0015 
0016 properties:
0017   compatible:
0018     enum:
0019       - nvidia,tegra210-qspi
0020       - nvidia,tegra186-qspi
0021       - nvidia,tegra194-qspi
0022       - nvidia,tegra234-qspi
0023       - nvidia,tegra241-qspi
0024 
0025   reg:
0026     maxItems: 1
0027 
0028   interrupts:
0029     maxItems: 1
0030 
0031   clock-names:
0032     items:
0033       - const: qspi
0034       - const: qspi_out
0035 
0036   clocks:
0037     maxItems: 2
0038 
0039   resets:
0040     maxItems: 1
0041 
0042   dmas:
0043     maxItems: 2
0044 
0045   dma-names:
0046     items:
0047       - const: rx
0048       - const: tx
0049 
0050 patternProperties:
0051   "@[0-9a-f]+":
0052     type: object
0053 
0054     properties:
0055       spi-rx-bus-width:
0056         enum: [1, 2, 4]
0057 
0058       spi-tx-bus-width:
0059         enum: [1, 2, 4]
0060 
0061 required:
0062   - compatible
0063   - reg
0064   - interrupts
0065   - clock-names
0066   - clocks
0067   - resets
0068 
0069 unevaluatedProperties: false
0070 
0071 examples:
0072   - |
0073     #include <dt-bindings/clock/tegra210-car.h>
0074     #include <dt-bindings/reset/tegra210-car.h>
0075     #include <dt-bindings/interrupt-controller/arm-gic.h>
0076     spi@70410000 {
0077             compatible = "nvidia,tegra210-qspi";
0078             reg = <0x70410000 0x1000>;
0079             interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
0080             #address-cells = <1>;
0081             #size-cells = <0>;
0082             clocks = <&tegra_car TEGRA210_CLK_QSPI>,
0083                      <&tegra_car TEGRA210_CLK_QSPI_PM>;
0084             clock-names = "qspi", "qspi_out";
0085             resets = <&tegra_car 211>;
0086             dmas = <&apbdma 5>, <&apbdma 5>;
0087             dma-names = "rx", "tx";
0088 
0089             flash@0 {
0090                     compatible = "jedec,spi-nor";
0091                     reg = <0>;
0092                     spi-max-frequency = <104000000>;
0093                     spi-tx-bus-width = <2>;
0094                     spi-rx-bus-width = <2>;
0095                     nvidia,tx-clk-tap-delay = <0>;
0096                     nvidia,rx-clk-tap-delay = <0>;
0097             };
0098     };