0001 NVIDIA Tegra114 SPI controller.
0002
0003 Required properties:
0004 - compatible : For Tegra114, must contain "nvidia,tegra114-spi".
0005 Otherwise, must contain '"nvidia,<chip>-spi", "nvidia,tegra114-spi"' where
0006 <chip> is tegra124, tegra132, or tegra210.
0007 - reg: Should contain SPI registers location and length.
0008 - interrupts: Should contain SPI interrupts.
0009 - clock-names : Must include the following entries:
0010 - spi
0011 - resets : Must contain an entry for each entry in reset-names.
0012 See ../reset/reset.txt for details.
0013 - reset-names : Must include the following entries:
0014 - spi
0015 - dmas : Must contain an entry for each entry in clock-names.
0016 See ../dma/dma.txt for details.
0017 - dma-names : Must include the following entries:
0018 - rx
0019 - tx
0020 - clocks : Must contain an entry for each entry in clock-names.
0021 See ../clocks/clock-bindings.txt for details.
0022
0023 Recommended properties:
0024 - spi-max-frequency: Definition as per
0025 Documentation/devicetree/bindings/spi/spi-bus.txt
0026 Optional properties:
0027 - nvidia,tx-clk-tap-delay: Delays the clock going out to the external device
0028 with this tap value. This property is used to tune the outgoing data from
0029 Tegra SPI master with respect to outgoing Tegra SPI master clock.
0030 Tap values vary based on the platform design trace lengths from Tegra SPI
0031 to corresponding slave devices. Valid tap values are from 0 thru 63.
0032 - nvidia,rx-clk-tap-delay: Delays the clock coming in from the external device
0033 with this tap value. This property is used to adjust the Tegra SPI master
0034 clock with respect to the data from the SPI slave device.
0035 Tap values vary based on the platform design trace lengths from Tegra SPI
0036 to corresponding slave devices. Valid tap values are from 0 thru 63.
0037
0038 Example:
0039
0040 spi@7000d600 {
0041 compatible = "nvidia,tegra114-spi";
0042 reg = <0x7000d600 0x200>;
0043 interrupts = <0 82 0x04>;
0044 spi-max-frequency = <25000000>;
0045 #address-cells = <1>;
0046 #size-cells = <0>;
0047 clocks = <&tegra_car 44>;
0048 clock-names = "spi";
0049 resets = <&tegra_car 44>;
0050 reset-names = "spi";
0051 dmas = <&apbdma 16>, <&apbdma 16>;
0052 dma-names = "rx", "tx";
0053 <spi-client>@<bus_num> {
0054 ...
0055 ...
0056 nvidia,rx-clk-tap-delay = <0>;
0057 nvidia,tx-clk-tap-delay = <16>;
0058 ...
0059 };
0060
0061 };
