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OSCL-LXR

 
 

    


0001 * Nuvoton FLASH Interface Unit (FIU) SPI Controller
0002 
0003 NPCM FIU supports single, dual and quad communication interface.
0004 
0005 The NPCM7XX supports three FIU modules,
0006 FIU0 and FIUx supports two chip selects,
0007 FIU3 support four chip select.
0008 
0009 The NPCM8XX supports four FIU modules,
0010 FIU0 and FIUx supports two chip selects,
0011 FIU1 and FIU3 supports four chip selects.
0012 
0013 Required properties:
0014   - compatible : "nuvoton,npcm750-fiu" for Poleg NPCM7XX BMC
0015                              "nuvoton,npcm845-fiu" for Arbel NPCM8XX BMC
0016   - #address-cells : should be 1.
0017   - #size-cells : should be 0.
0018   - reg : the first contains the register location and length,
0019           the second contains the memory mapping address and length
0020   - reg-names: Should contain the reg names "control" and "memory"
0021   - clocks : phandle of FIU reference clock.
0022 
0023 Required properties in case the pins can be muxed:
0024   - pinctrl-names : a pinctrl state named "default" must be defined.
0025   - pinctrl-0 : phandle referencing pin configuration of the device.
0026 
0027 Optional property:
0028   - nuvoton,spix-mode: enable spix-mode for an expansion bus to an ASIC or CPLD.
0029 
0030 Aliases:
0031 - All the FIU controller nodes should be represented in the aliases node using
0032   the following format 'fiu{n}' where n is a unique number for the alias.
0033   In the NPCM7XX BMC:
0034                 fiu0 represent fiu 0 controller
0035                 fiu1 represent fiu 3 controller
0036                 fiu2 represent fiu x controller
0037 
0038   In the NPCM8XX BMC:
0039                 fiu0 represent fiu 0 controller
0040                 fiu1 represent fiu 1 controller
0041                 fiu2 represent fiu 3 controller
0042                 fiu3 represent fiu x controller
0043 
0044 Example:
0045 fiu3: spi@c00000000 {
0046         compatible = "nuvoton,npcm750-fiu";
0047         #address-cells = <1>;
0048         #size-cells = <0>;
0049         reg = <0xfb000000 0x1000>, <0x80000000 0x10000000>;
0050         reg-names = "control", "memory";
0051         clocks = <&clk NPCM7XX_CLK_AHB>;
0052         pinctrl-names = "default";
0053         pinctrl-0 = <&spi3_pins>;
0054         spi-nor@0 {
0055                         ...
0056         };
0057 };
0058