0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-nor.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Serial NOR flash controller for MediaTek ARM SoCs
0008
0009 maintainers:
0010 - Bayi Cheng <bayi.cheng@mediatek.com>
0011 - Chuanhong Guo <gch981213@gmail.com>
0012
0013 description: |
0014 This spi controller support single, dual, or quad mode transfer for
0015 SPI NOR flash. There should be only one spi slave device following
0016 generic spi bindings. It's not recommended to use this controller
0017 for devices other than SPI NOR flash due to limited transfer
0018 capability of this controller.
0019
0020 allOf:
0021 - $ref: /schemas/spi/spi-controller.yaml#
0022
0023 properties:
0024 compatible:
0025 oneOf:
0026 - enum:
0027 - mediatek,mt8173-nor
0028 - mediatek,mt8186-nor
0029 - mediatek,mt8192-nor
0030 - items:
0031 - enum:
0032 - mediatek,mt2701-nor
0033 - mediatek,mt2712-nor
0034 - mediatek,mt7622-nor
0035 - mediatek,mt7623-nor
0036 - mediatek,mt7629-nor
0037 - mediatek,mt8195-nor
0038 - const: mediatek,mt8173-nor
0039 - items:
0040 - enum:
0041 - mediatek,mt8188-nor
0042 - const: mediatek,mt8186-nor
0043
0044 reg:
0045 maxItems: 1
0046
0047 interrupts:
0048 maxItems: 1
0049
0050 clocks:
0051 minItems: 2
0052 items:
0053 - description: clock used for spi bus
0054 - description: clock used for controller
0055 - description: clock used for nor dma bus. this depends on hardware
0056 design, so this is optional.
0057 - description: clock used for controller axi slave bus.
0058 this depends on hardware design, so it is optional.
0059
0060 clock-names:
0061 minItems: 2
0062 items:
0063 - const: spi
0064 - const: sf
0065 - const: axi
0066 - const: axi_s
0067
0068 required:
0069 - compatible
0070 - reg
0071 - clocks
0072 - clock-names
0073
0074 unevaluatedProperties: false
0075
0076 examples:
0077 - |
0078 #include <dt-bindings/clock/mt8173-clk.h>
0079
0080 soc {
0081 #address-cells = <2>;
0082 #size-cells = <2>;
0083
0084 nor_flash: spi@1100d000 {
0085 compatible = "mediatek,mt8173-nor";
0086 reg = <0 0x1100d000 0 0xe0>;
0087 interrupts = <1>;
0088 clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>;
0089 clock-names = "spi", "sf";
0090 #address-cells = <1>;
0091 #size-cells = <0>;
0092
0093 flash@0 {
0094 compatible = "jedec,spi-nor";
0095 reg = <0>;
0096 };
0097 };
0098 };