bindings/spi/mediatek%2Cspi-mt65xx.yaml

0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/spi/mediatek,spi-mt65xx.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: SPI Bus controller for MediaTek ARM SoCs
0008
0009 maintainers:
0010   - Leilk Liu <leilk.liu@mediatek.com>
0011
0012 allOf:
0013   - $ref: "/schemas/spi/spi-controller.yaml#"
0014
0015 properties:
0016   compatible:
0017     oneOf:
0018       - items:
0019           - enum:
0020               - mediatek,mt7629-spi
0021               - mediatek,mt8365-spi
0022           - const: mediatek,mt7622-spi
0023       - items:
0024           - enum:
0025               - mediatek,mt8516-spi
0026           - const: mediatek,mt2712-spi
0027       - items:
0028           - enum:
0029               - mediatek,mt6779-spi
0030               - mediatek,mt8186-spi
0031               - mediatek,mt8192-spi
0032               - mediatek,mt8195-spi
0033           - const: mediatek,mt6765-spi
0034       - items:
0035           - enum:
0036               - mediatek,mt7986-spi-ipm
0037               - mediatek,mt8188-spi-ipm
0038           - const: mediatek,spi-ipm
0039       - items:
0040           - enum:
0041               - mediatek,mt2701-spi
0042               - mediatek,mt2712-spi
0043               - mediatek,mt6589-spi
0044               - mediatek,mt6765-spi
0045               - mediatek,mt6893-spi
0046               - mediatek,mt7622-spi
0047               - mediatek,mt8135-spi
0048               - mediatek,mt8173-spi
0049               - mediatek,mt8183-spi
0050
0051   reg:
0052     maxItems: 1
0053
0054   interrupts:
0055     maxItems: 1
0056
0057   clocks:
0058     minItems: 3
0059     items:
0060       - description: clock used for the parent clock
0061       - description: clock used for the muxes clock
0062       - description: clock used for the clock gate
0063       - description: clock used for the AHB bus, this clock is optional
0064
0065   clock-names:
0066     minItems: 3
0067     items:
0068       - const: parent-clk
0069       - const: sel-clk
0070       - const: spi-clk
0071       - const: hclk
0072
0073   mediatek,pad-select:
0074     $ref: /schemas/types.yaml#/definitions/uint32-array
0075     minItems: 1
0076     maxItems: 4
0077     items:
0078       enum: [0, 1, 2, 3]
0079     description:
0080       specify which pins group(ck/mi/mo/cs) spi controller used.
0081       This is an array.
0082
0083 required:
0084   - compatible
0085   - reg
0086   - interrupts
0087   - clocks
0088   - clock-names
0089   - '#address-cells'
0090   - '#size-cells'
0091
0092 unevaluatedProperties: false
0093
0094 examples:
0095   - |
0096     #include <dt-bindings/clock/mt8173-clk.h>
0097     #include <dt-bindings/gpio/gpio.h>
0098     #include <dt-bindings/interrupt-controller/arm-gic.h>
0099     #include <dt-bindings/interrupt-controller/irq.h>
0100
0101     spi@1100a000 {
0102       compatible = "mediatek,mt8173-spi";
0103       #address-cells = <1>;
0104       #size-cells = <0>;
0105       reg = <0x1100a000 0x1000>;
0106       interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>;
0107       clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
0108                <&topckgen CLK_TOP_SPI_SEL>,
0109                <&pericfg CLK_PERI_SPI0>;
0110       clock-names = "parent-clk", "sel-clk", "spi-clk";
0111       cs-gpios = <&pio 105 GPIO_ACTIVE_LOW>, <&pio 72 GPIO_ACTIVE_LOW>;
0112       mediatek,pad-select = <1>, <0>;
0113     };