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OSCL-LXR

 
 

    


0001 J-Core SPI master
0002 
0003 Required properties:
0004 
0005 - compatible: Must be "jcore,spi2".
0006 
0007 - reg: Memory region for registers.
0008 
0009 - #address-cells: Must be 1.
0010 
0011 - #size-cells: Must be 0.
0012 
0013 Optional properties:
0014 
0015 - clocks: If a phandle named "ref_clk" is present, SPI clock speed
0016   programming is relative to the frequency of the indicated clock.
0017   Necessary only if the input clock rate is something other than a
0018   fixed 50 MHz.
0019 
0020 - clock-names: Clock names, one for each phandle in clocks.
0021 
0022 See spi-bus.txt for additional properties not specific to this device.
0023 
0024 Example:
0025 
0026 spi@40 {
0027         compatible = "jcore,spi2";
0028         #address-cells = <1>;
0029         #size-cells = <0>;
0030         reg = <0x40 0x8>;
0031         spi-max-frequency = <25000000>;
0032         clocks = <&bus_clk>;
0033         clock-names = "ref_clk";
0034 }