0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/spi/cdns,qspi-nor-peripheral-props.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Peripheral-specific properties for the Cadence QSPI controller.
0008
0009 description:
0010 See spi-peripheral-props.yaml for more info.
0011
0012 maintainers:
0013 - Vaishnav Achath <vaishnav.a@ti.com>
0014
0015 properties:
0016 # cdns,qspi-nor.yaml
0017 cdns,read-delay:
0018 $ref: /schemas/types.yaml#/definitions/uint32
0019 description:
0020 Delay for read capture logic, in clock cycles.
0021
0022 cdns,tshsl-ns:
0023 description:
0024 Delay in nanoseconds for the length that the master mode chip select
0025 outputs are de-asserted between transactions.
0026
0027 cdns,tsd2d-ns:
0028 description:
0029 Delay in nanoseconds between one chip select being de-activated
0030 and the activation of another.
0031
0032 cdns,tchsh-ns:
0033 description:
0034 Delay in nanoseconds between last bit of current transaction and
0035 deasserting the device chip select (qspi_n_ss_out).
0036
0037 cdns,tslch-ns:
0038 description:
0039 Delay in nanoseconds between setting qspi_n_ss_out low and
0040 first bit transfer.
0041
0042 additionalProperties: true
