0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/soc/ti/ti,pruss.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: |+
0008 TI Programmable Real-Time Unit and Industrial Communication Subsystem
0009
0010 maintainers:
0011 - Suman Anna <s-anna@ti.com>
0012
0013 description: |+
0014
0015 The Programmable Real-Time Unit and Industrial Communication Subsystem
0016 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x,
0017 Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC
0018 cores (Programmable Real-Time Units, or PRUs), shared RAM, data and
0019 instruction RAMs, some internal peripheral modules to facilitate industrial
0020 communication, and an interrupt controller.
0021
0022 The programmable nature of the PRUs provide flexibility to implement custom
0023 peripheral interfaces, fast real-time responses, or specialized data handling.
0024 The common peripheral modules include the following,
0025 - an Ethernet MII_RT module with two MII ports
0026 - an MDIO port to control external Ethernet PHYs
0027 - an Industrial Ethernet Peripheral (IEP) to manage/generate Industrial
0028 Ethernet functions
0029 - an Enhanced Capture Module (eCAP)
0030 - an Industrial Ethernet Timer with 7/9 capture and 16 compare events
0031 - a 16550-compatible UART to support PROFIBUS
0032 - Enhanced GPIO with async capture and serial support
0033
0034 A PRU-ICSS subsystem can have up to three shared data memories. A PRU core
0035 acts on a primary Data RAM (there are usually 2 Data RAMs) at its address
0036 0x0, but also has access to a secondary Data RAM (primary to the other PRU
0037 core) at its address 0x2000. A shared Data RAM, if present, can be accessed
0038 by both the PRU cores. The Interrupt Controller (INTC) and a CFG module are
0039 common to both the PRU cores. Each PRU core also has a private instruction
0040 RAM, and specific register spaces for Control and Debug functionalities.
0041
0042 Various sub-modules within a PRU-ICSS subsystem are represented as individual
0043 nodes and are defined using a parent-child hierarchy depending on their
0044 integration within the IP and the SoC. These nodes are described in the
0045 following sections.
0046
0047
0048 PRU-ICSS Node
0049 ==============
0050 Each PRU-ICSS instance is represented as its own node with the individual PRU
0051 processor cores, the memories node, an INTC node and an MDIO node represented
0052 as child nodes within this PRUSS node. This node shall be a child of the
0053 corresponding interconnect bus nodes or target-module nodes.
0054
0055 See ../../mfd/syscon.yaml for generic SysCon binding details.
0056
0057
0058 properties:
0059 $nodename:
0060 pattern: "^(pruss|icssg)@[0-9a-f]+$"
0061
0062 compatible:
0063 enum:
0064 - ti,am3356-pruss # for AM335x SoC family
0065 - ti,am4376-pruss0 # for AM437x SoC family and PRUSS unit 0
0066 - ti,am4376-pruss1 # for AM437x SoC family and PRUSS unit 1
0067 - ti,am5728-pruss # for AM57xx SoC family
0068 - ti,am625-pruss # for K3 AM62x SoC family
0069 - ti,am642-icssg # for K3 AM64x SoC family
0070 - ti,am654-icssg # for K3 AM65x SoC family
0071 - ti,j721e-icssg # for K3 J721E SoC family
0072 - ti,k2g-pruss # for 66AK2G SoC family
0073
0074 reg:
0075 maxItems: 1
0076
0077 "#address-cells":
0078 const: 1
0079
0080 "#size-cells":
0081 const: 1
0082
0083 ranges:
0084 maxItems: 1
0085
0086 dma-ranges:
0087 maxItems: 1
0088
0089 dma-coherent: true
0090
0091 power-domains:
0092 description: |
0093 This property is as per sci-pm-domain.txt.
0094
0095 patternProperties:
0096
0097 memories@[a-f0-9]+$:
0098 description: |
0099 The various Data RAMs within a single PRU-ICSS unit are represented as a
0100 single node with the name 'memories'.
0101
0102 type: object
0103
0104 properties:
0105 reg:
0106 minItems: 2 # On AM437x one of two PRUSS units don't contain Shared RAM.
0107 items:
0108 - description: Address and size of the Data RAM0.
0109 - description: Address and size of the Data RAM1.
0110 - description: |
0111 Address and size of the Shared Data RAM. Note that on AM437x one
0112 of two PRUSS units don't contain Shared RAM, while the second one
0113 has it.
0114
0115 reg-names:
0116 minItems: 2
0117 items:
0118 - const: dram0
0119 - const: dram1
0120 - const: shrdram2
0121
0122 required:
0123 - reg
0124 - reg-names
0125
0126 additionalProperties: false
0127
0128 cfg@[a-f0-9]+$:
0129 description: |
0130 PRU-ICSS configuration space. CFG sub-module represented as a SysCon.
0131
0132 type: object
0133
0134 properties:
0135 compatible:
0136 items:
0137 - const: ti,pruss-cfg
0138 - const: syscon
0139
0140 "#address-cells":
0141 const: 1
0142
0143 "#size-cells":
0144 const: 1
0145
0146 reg:
0147 maxItems: 1
0148
0149 ranges:
0150 maxItems: 1
0151
0152 clocks:
0153 type: object
0154
0155 properties:
0156 "#address-cells":
0157 const: 1
0158
0159 "#size-cells":
0160 const: 0
0161
0162 patternProperties:
0163 coreclk-mux@[a-f0-9]+$:
0164 description: |
0165 This is applicable only for ICSSG (K3 SoCs). The ICSSG modules
0166 core clock can be set to one of the 2 sources: ICSSG_CORE_CLK or
0167 ICSSG_ICLK. This node models this clock mux and should have the
0168 name "coreclk-mux".
0169
0170 type: object
0171
0172 properties:
0173 '#clock-cells':
0174 const: 0
0175
0176 clocks:
0177 items:
0178 - description: ICSSG_CORE Clock
0179 - description: ICSSG_ICLK Clock
0180
0181 assigned-clocks:
0182 maxItems: 1
0183
0184 assigned-clock-parents:
0185 maxItems: 1
0186 description: |
0187 Standard assigned-clocks-parents definition used for selecting
0188 mux parent (one of the mux input).
0189
0190 reg:
0191 maxItems: 1
0192
0193 required:
0194 - clocks
0195
0196 additionalProperties: false
0197
0198 iepclk-mux@[a-f0-9]+$:
0199 description: |
0200 The IEP module can get its clock from 2 sources: ICSSG_IEP_CLK or
0201 CORE_CLK (OCP_CLK in older SoCs). This node models this clock
0202 mux and should have the name "iepclk-mux".
0203
0204 type: object
0205
0206 properties:
0207 '#clock-cells':
0208 const: 0
0209
0210 clocks:
0211 items:
0212 - description: ICSSG_IEP Clock
0213 - description: Core Clock (OCP Clock in older SoCs)
0214
0215 assigned-clocks:
0216 maxItems: 1
0217
0218 assigned-clock-parents:
0219 maxItems: 1
0220 description: |
0221 Standard assigned-clocks-parents definition used for selecting
0222 mux parent (one of the mux input).
0223
0224 reg:
0225 maxItems: 1
0226
0227 required:
0228 - clocks
0229
0230 additionalProperties: false
0231
0232 additionalProperties: false
0233
0234 iep@[a-f0-9]+$:
0235 description: |
0236 Industrial Ethernet Peripheral to manage/generate Industrial Ethernet
0237 functions such as time stamping. Each PRUSS has either 1 IEP (on AM335x,
0238 AM437x, AM57xx & 66AK2G SoCs) or 2 IEPs (on K3 AM65x, J721E & AM64x SoCs).
0239 IEP is used for creating PTP clocks and generating PPS signals.
0240
0241 type: object
0242
0243 mii-rt@[a-f0-9]+$:
0244 description: |
0245 Real-Time Ethernet to support multiple industrial communication protocols.
0246 MII-RT sub-module represented as a SysCon.
0247
0248 type: object
0249
0250 properties:
0251 compatible:
0252 items:
0253 - const: ti,pruss-mii
0254 - const: syscon
0255
0256 reg:
0257 maxItems: 1
0258
0259 additionalProperties: false
0260
0261 mii-g-rt@[a-f0-9]+$:
0262 description: |
0263 The Real-time Media Independent Interface to support multiple industrial
0264 communication protocols (G stands for Gigabit). MII-G-RT sub-module
0265 represented as a SysCon.
0266
0267 type: object
0268
0269 properties:
0270 compatible:
0271 items:
0272 - const: ti,pruss-mii-g
0273 - const: syscon
0274
0275 reg:
0276 maxItems: 1
0277
0278 additionalProperties: false
0279
0280 interrupt-controller@[a-f0-9]+$:
0281 description: |
0282 PRUSS INTC Node. Each PRUSS has a single interrupt controller instance
0283 that is common to all the PRU cores. This should be represented as an
0284 interrupt-controller node.
0285 $ref: /schemas/interrupt-controller/ti,pruss-intc.yaml#
0286 type: object
0287
0288 mdio@[a-f0-9]+$:
0289 description: |
0290 MDIO Node. Each PRUSS has an MDIO module that can be used to control
0291 external PHYs. The MDIO module used within the PRU-ICSS is an instance of
0292 the MDIO Controller used in TI Davinci SoCs.
0293 $ref: /schemas/net/ti,davinci-mdio.yaml#
0294 type: object
0295
0296 "^(pru|rtu|txpru)@[0-9a-f]+$":
0297 description: |
0298 PRU Node. Each PRUSS has dual PRU cores, each represented as a RemoteProc
0299 device through a PRU child node each. Each node can optionally be rendered
0300 inactive by using the standard DT string property, "status". The ICSSG IP
0301 present on K3 SoCs have additional auxiliary PRU cores with slightly
0302 different IP integration.
0303 $ref: /schemas/remoteproc/ti,pru-rproc.yaml#
0304 type: object
0305
0306 required:
0307 - compatible
0308 - reg
0309 - ranges
0310
0311 additionalProperties: false
0312
0313 # Due to inability of correctly verifying sub-nodes with an @address through
0314 # the "required" list, the required sub-nodes below are commented out for now.
0315
0316 #required:
0317 # - memories
0318 # - interrupt-controller
0319 # - pru
0320
0321 allOf:
0322 - if:
0323 properties:
0324 compatible:
0325 contains:
0326 enum:
0327 - ti,k2g-pruss
0328 - ti,am654-icssg
0329 - ti,j721e-icssg
0330 - ti,am642-icssg
0331 then:
0332 required:
0333 - power-domains
0334
0335 - if:
0336 properties:
0337 compatible:
0338 contains:
0339 enum:
0340 - ti,k2g-pruss
0341 then:
0342 required:
0343 - dma-coherent
0344
0345 examples:
0346 - |
0347
0348 /* Example 1 AM33xx PRU-ICSS */
0349 pruss: pruss@0 {
0350 compatible = "ti,am3356-pruss";
0351 reg = <0x0 0x80000>;
0352 #address-cells = <1>;
0353 #size-cells = <1>;
0354 ranges;
0355
0356 pruss_mem: memories@0 {
0357 reg = <0x0 0x2000>,
0358 <0x2000 0x2000>,
0359 <0x10000 0x3000>;
0360 reg-names = "dram0", "dram1", "shrdram2";
0361 };
0362
0363 pruss_cfg: cfg@26000 {
0364 compatible = "ti,pruss-cfg", "syscon";
0365 #address-cells = <1>;
0366 #size-cells = <1>;
0367 reg = <0x26000 0x2000>;
0368 ranges = <0x00 0x26000 0x2000>;
0369
0370 clocks {
0371 #address-cells = <1>;
0372 #size-cells = <0>;
0373
0374 pruss_iepclk_mux: iepclk-mux@30 {
0375 reg = <0x30>;
0376 #clock-cells = <0>;
0377 clocks = <&l3_gclk>, /* icss_iep */
0378 <&pruss_ocp_gclk>; /* icss_ocp */
0379 };
0380 };
0381 };
0382
0383 pruss_mii_rt: mii-rt@32000 {
0384 compatible = "ti,pruss-mii", "syscon";
0385 reg = <0x32000 0x58>;
0386 };
0387
0388 pruss_intc: interrupt-controller@20000 {
0389 compatible = "ti,pruss-intc";
0390 reg = <0x20000 0x2000>;
0391 interrupt-controller;
0392 #interrupt-cells = <3>;
0393 interrupts = <20 21 22 23 24 25 26 27>;
0394 interrupt-names = "host_intr0", "host_intr1",
0395 "host_intr2", "host_intr3",
0396 "host_intr4", "host_intr5",
0397 "host_intr6", "host_intr7";
0398 };
0399
0400 pru0: pru@34000 {
0401 compatible = "ti,am3356-pru";
0402 reg = <0x34000 0x2000>,
0403 <0x22000 0x400>,
0404 <0x22400 0x100>;
0405 reg-names = "iram", "control", "debug";
0406 firmware-name = "am335x-pru0-fw";
0407 };
0408
0409 pru1: pru@38000 {
0410 compatible = "ti,am3356-pru";
0411 reg = <0x38000 0x2000>,
0412 <0x24000 0x400>,
0413 <0x24400 0x100>;
0414 reg-names = "iram", "control", "debug";
0415 firmware-name = "am335x-pru1-fw";
0416 };
0417
0418 pruss_mdio: mdio@32400 {
0419 compatible = "ti,davinci_mdio";
0420 reg = <0x32400 0x90>;
0421 clocks = <&dpll_core_m4_ck>;
0422 clock-names = "fck";
0423 bus_freq = <1000000>;
0424 #address-cells = <1>;
0425 #size-cells = <0>;
0426 };
0427 };
0428
0429 - |
0430
0431 /* Example 2 AM43xx PRU-ICSS with PRUSS1 node */
0432 #include <dt-bindings/interrupt-controller/arm-gic.h>
0433 pruss1: pruss@0 {
0434 compatible = "ti,am4376-pruss1";
0435 reg = <0x0 0x40000>;
0436 #address-cells = <1>;
0437 #size-cells = <1>;
0438 ranges;
0439
0440 pruss1_mem: memories@0 {
0441 reg = <0x0 0x2000>,
0442 <0x2000 0x2000>,
0443 <0x10000 0x8000>;
0444 reg-names = "dram0", "dram1", "shrdram2";
0445 };
0446
0447 pruss1_cfg: cfg@26000 {
0448 compatible = "ti,pruss-cfg", "syscon";
0449 #address-cells = <1>;
0450 #size-cells = <1>;
0451 reg = <0x26000 0x2000>;
0452 ranges = <0x00 0x26000 0x2000>;
0453
0454 clocks {
0455 #address-cells = <1>;
0456 #size-cells = <0>;
0457
0458 pruss1_iepclk_mux: iepclk-mux@30 {
0459 reg = <0x30>;
0460 #clock-cells = <0>;
0461 clocks = <&sysclk_div>, /* icss_iep */
0462 <&pruss_ocp_gclk>; /* icss_ocp */
0463 };
0464 };
0465 };
0466
0467 pruss1_mii_rt: mii-rt@32000 {
0468 compatible = "ti,pruss-mii", "syscon";
0469 reg = <0x32000 0x58>;
0470 };
0471
0472 pruss1_intc: interrupt-controller@20000 {
0473 compatible = "ti,pruss-intc";
0474 reg = <0x20000 0x2000>;
0475 interrupt-controller;
0476 #interrupt-cells = <3>;
0477 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
0478 <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
0479 <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
0480 <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
0481 <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
0482 <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
0483 <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
0484 interrupt-names = "host_intr0", "host_intr1",
0485 "host_intr2", "host_intr3",
0486 "host_intr4",
0487 "host_intr6", "host_intr7";
0488 ti,irqs-reserved = /bits/ 8 <0x20>; /* BIT(5) */
0489 };
0490
0491 pru1_0: pru@34000 {
0492 compatible = "ti,am4376-pru";
0493 reg = <0x34000 0x3000>,
0494 <0x22000 0x400>,
0495 <0x22400 0x100>;
0496 reg-names = "iram", "control", "debug";
0497 firmware-name = "am437x-pru1_0-fw";
0498 };
0499
0500 pru1_1: pru@38000 {
0501 compatible = "ti,am4376-pru";
0502 reg = <0x38000 0x3000>,
0503 <0x24000 0x400>,
0504 <0x24400 0x100>;
0505 reg-names = "iram", "control", "debug";
0506 firmware-name = "am437x-pru1_1-fw";
0507 };
0508
0509 pruss1_mdio: mdio@32400 {
0510 compatible = "ti,davinci_mdio";
0511 reg = <0x32400 0x90>;
0512 clocks = <&dpll_core_m4_ck>;
0513 clock-names = "fck";
0514 bus_freq = <1000000>;
0515 #address-cells = <1>;
0516 #size-cells = <0>;
0517 };
0518 };
0519
0520 ...
