0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
0003 %YAML 1.2
0004 ---
0005 $id: "http://devicetree.org/schemas/soc/ti/k3-ringacc.yaml#"
0006 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
0007
0008 title: Texas Instruments K3 NavigatorSS Ring Accelerator
0009
0010 maintainers:
0011 - Santosh Shilimkar <ssantosh@kernel.org>
0012 - Grygorii Strashko <grygorii.strashko@ti.com>
0013
0014 description: |
0015 The Ring Accelerator (RA) is a machine which converts read/write accesses
0016 from/to a constant address into corresponding read/write accesses from/to a
0017 circular data structure in memory. The RA eliminates the need for each DMA
0018 controller which needs to access ring elements from having to know the current
0019 state of the ring (base address, current offset). The DMA controller
0020 performs a read or write access to a specific address range (which maps to the
0021 source interface on the RA) and the RA replaces the address for the transaction
0022 with a new address which corresponds to the head or tail element of the ring
0023 (head for reads, tail for writes).
0024
0025 The Ring Accelerator is a hardware module that is responsible for accelerating
0026 management of the packet queues. The K3 SoCs can have more than one RA instances
0027
0028 properties:
0029 compatible:
0030 items:
0031 - const: ti,am654-navss-ringacc
0032
0033 reg:
0034 items:
0035 - description: real time registers regions
0036 - description: fifos registers regions
0037 - description: proxy gcfg registers regions
0038 - description: proxy target registers regions
0039
0040 reg-names:
0041 items:
0042 - const: rt
0043 - const: fifos
0044 - const: proxy_gcfg
0045 - const: proxy_target
0046
0047 msi-parent: true
0048
0049 ti,num-rings:
0050 $ref: /schemas/types.yaml#/definitions/uint32
0051 description: Number of rings supported by RA
0052
0053 ti,sci-rm-range-gp-rings:
0054 $ref: /schemas/types.yaml#/definitions/uint32
0055 description: TI-SCI RM subtype for GP ring range
0056
0057 ti,sci:
0058 $ref: /schemas/types.yaml#/definitions/phandle-array
0059 description: phandle on TI-SCI compatible System controller node
0060
0061 ti,sci-dev-id:
0062 $ref: /schemas/types.yaml#/definitions/uint32
0063 description: TI-SCI device id of the ring accelerator
0064
0065 required:
0066 - compatible
0067 - reg
0068 - reg-names
0069 - msi-parent
0070 - ti,num-rings
0071 - ti,sci-rm-range-gp-rings
0072 - ti,sci
0073 - ti,sci-dev-id
0074
0075 additionalProperties: false
0076
0077 examples:
0078 - |
0079 bus {
0080 #address-cells = <2>;
0081 #size-cells = <2>;
0082
0083 ringacc: ringacc@3c000000 {
0084 compatible = "ti,am654-navss-ringacc";
0085 reg = <0x0 0x3c000000 0x0 0x400000>,
0086 <0x0 0x38000000 0x0 0x400000>,
0087 <0x0 0x31120000 0x0 0x100>,
0088 <0x0 0x33000000 0x0 0x40000>;
0089 reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
0090 ti,num-rings = <818>;
0091 ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
0092 ti,sci = <&dmsc>;
0093 ti,sci-dev-id = <187>;
0094 msi-parent = <&inta_main_udmass>;
0095 };
0096 };
