0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Atmel Timer Counter Block
0008
0009 maintainers:
0010 - Alexandre Belloni <alexandre.belloni@bootlin.com>
0011
0012 description: |
0013 The Atmel (now Microchip) SoCs have timers named Timer Counter Block. Each
0014 timer has three channels with two counters each.
0015
0016 properties:
0017 compatible:
0018 items:
0019 - enum:
0020 - atmel,at91rm9200-tcb
0021 - atmel,at91sam9x5-tcb
0022 - atmel,sama5d2-tcb
0023 - const: simple-mfd
0024 - const: syscon
0025
0026 reg:
0027 maxItems: 1
0028
0029 interrupts:
0030 description:
0031 List of interrupts. One interrupt per TCB channel if available or one
0032 interrupt for the TC block
0033 minItems: 1
0034 maxItems: 3
0035
0036 clock-names:
0037 description:
0038 List of clock names. Always includes t0_clk and slow clk. Also includes
0039 t1_clk and t2_clk if a clock per channel is available.
0040 minItems: 2
0041 maxItems: 4
0042
0043 clocks:
0044 minItems: 2
0045 maxItems: 4
0046
0047 '#address-cells':
0048 const: 1
0049
0050 '#size-cells':
0051 const: 0
0052
0053 patternProperties:
0054 "^timer@[0-2]$":
0055 description: The timer block channels that are used as timers or counters.
0056 type: object
0057 properties:
0058 compatible:
0059 items:
0060 - enum:
0061 - atmel,tcb-timer
0062 - atmel,tcb-pwm
0063 - microchip,tcb-capture
0064 reg:
0065 description:
0066 List of channels to use for this particular timer. In Microchip TCB capture
0067 mode channels are registered as a counter devices, for the qdec mode TCB0's
0068 channel <0> and <1> are required.
0069
0070 minItems: 1
0071 maxItems: 3
0072 required:
0073 - compatible
0074 - reg
0075
0076 "^pwm@[0-2]$":
0077 description: The timer block channels that are used as PWMs.
0078 $ref: /schemas/pwm/pwm.yaml#
0079 type: object
0080 properties:
0081 compatible:
0082 const: atmel,tcb-pwm
0083 reg:
0084 description:
0085 TCB channel to use for this PWM.
0086 enum: [ 0, 1, 2 ]
0087
0088 "#pwm-cells":
0089 description:
0090 The only third cell flag supported by this binding is
0091 PWM_POLARITY_INVERTED.
0092 const: 3
0093
0094 required:
0095 - compatible
0096 - reg
0097 - "#pwm-cells"
0098
0099 additionalProperties: false
0100
0101
0102 allOf:
0103 - if:
0104 properties:
0105 compatible:
0106 contains:
0107 const: atmel,sama5d2-tcb
0108 then:
0109 properties:
0110 clocks:
0111 minItems: 3
0112 maxItems: 3
0113 clock-names:
0114 items:
0115 - const: t0_clk
0116 - const: gclk
0117 - const: slow_clk
0118 else:
0119 properties:
0120 clocks:
0121 minItems: 2
0122 maxItems: 4
0123 clock-names:
0124 oneOf:
0125 - items:
0126 - const: t0_clk
0127 - const: slow_clk
0128 - items:
0129 - const: t0_clk
0130 - const: t1_clk
0131 - const: t2_clk
0132 - const: slow_clk
0133
0134 required:
0135 - compatible
0136 - reg
0137 - interrupts
0138 - clocks
0139 - clock-names
0140 - '#address-cells'
0141 - '#size-cells'
0142
0143 additionalProperties: false
0144
0145 examples:
0146 - |
0147 /* One interrupt per TC block: */
0148 tcb0: timer@fff7c000 {
0149 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
0150 #address-cells = <1>;
0151 #size-cells = <0>;
0152 reg = <0xfff7c000 0x100>;
0153 interrupts = <18 4>;
0154 clocks = <&tcb0_clk>, <&clk32k>;
0155 clock-names = "t0_clk", "slow_clk";
0156
0157 timer@0 {
0158 compatible = "atmel,tcb-timer";
0159 reg = <0>, <1>;
0160 };
0161
0162 timer@2 {
0163 compatible = "atmel,tcb-timer";
0164 reg = <2>;
0165 };
0166 };
0167
0168 /* One interrupt per TC channel in a TC block: */
0169 tcb1: timer@fffdc000 {
0170 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
0171 #address-cells = <1>;
0172 #size-cells = <0>;
0173 reg = <0xfffdc000 0x100>;
0174 interrupts = <26 4>, <27 4>, <28 4>;
0175 clocks = <&tcb1_clk>, <&clk32k>;
0176 clock-names = "t0_clk", "slow_clk";
0177
0178 timer@0 {
0179 compatible = "atmel,tcb-timer";
0180 reg = <0>;
0181 };
0182
0183 timer@1 {
0184 compatible = "atmel,tcb-timer";
0185 reg = <1>;
0186 };
0187
0188 pwm@2 {
0189 compatible = "atmel,tcb-pwm";
0190 reg = <2>;
0191 #pwm-cells = <3>;
0192 };
0193 };
0194 /* TCB0 Capture with QDEC: */
0195 timer@f800c000 {
0196 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
0197 #address-cells = <1>;
0198 #size-cells = <0>;
0199 reg = <0xfff7c000 0x100>;
0200 interrupts = <18 4>;
0201 clocks = <&tcb0_clk>, <&clk32k>;
0202 clock-names = "t0_clk", "slow_clk";
0203
0204 timer@0 {
0205 compatible = "microchip,tcb-capture";
0206 reg = <0>, <1>;
0207 };
0208
0209 timer@2 {
0210 compatible = "atmel,tcb-timer";
0211 reg = <2>;
0212 };
0213 };
