0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: NXP i.MX8MQ VPU blk-ctrl
0008
0009 maintainers:
0010 - Lucas Stach <l.stach@pengutronix.de>
0011
0012 description:
0013 The i.MX8MQ VPU blk-ctrl is a top-level peripheral providing access to
0014 the NoC and ensuring proper power sequencing of the VPU peripherals
0015 located in the VPU domain of the SoC.
0016
0017 properties:
0018 compatible:
0019 items:
0020 - const: fsl,imx8mq-vpu-blk-ctrl
0021
0022 reg:
0023 maxItems: 1
0024
0025 '#power-domain-cells':
0026 const: 1
0027
0028 power-domains:
0029 minItems: 3
0030 maxItems: 3
0031
0032 power-domain-names:
0033 items:
0034 - const: bus
0035 - const: g1
0036 - const: g2
0037
0038 clocks:
0039 minItems: 2
0040 maxItems: 2
0041
0042 clock-names:
0043 items:
0044 - const: g1
0045 - const: g2
0046
0047 required:
0048 - compatible
0049 - reg
0050 - power-domains
0051 - power-domain-names
0052 - clocks
0053 - clock-names
0054
0055 additionalProperties: false
0056
0057 examples:
0058 - |
0059 #include <dt-bindings/clock/imx8mq-clock.h>
0060 #include <dt-bindings/power/imx8mq-power.h>
0061
0062 vpu_blk_ctrl: blk-ctrl@38320000 {
0063 compatible = "fsl,imx8mq-vpu-blk-ctrl";
0064 reg = <0x38320000 0x100>;
0065 power-domains = <&pgc_vpu>, <&pgc_vpu>, <&pgc_vpu>;
0066 power-domain-names = "bus", "g1", "g2";
0067 clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
0068 <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
0069 clock-names = "g1", "g2";
0070 #power-domain-cells = <1>;
0071 };
