0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: NXP i.MX8MN DISP blk-ctrl
0008
0009 maintainers:
0010 - Lucas Stach <l.stach@pengutronix.de>
0011
0012 description:
0013 The i.MX8MN DISP blk-ctrl is a top-level peripheral providing access to
0014 the NoC and ensuring proper power sequencing of the display and MIPI CSI
0015 peripherals located in the DISP domain of the SoC.
0016
0017 properties:
0018 compatible:
0019 items:
0020 - const: fsl,imx8mn-disp-blk-ctrl
0021 - const: syscon
0022
0023 reg:
0024 maxItems: 1
0025
0026 '#power-domain-cells':
0027 const: 1
0028
0029 power-domains:
0030 minItems: 5
0031 maxItems: 5
0032
0033 power-domain-names:
0034 items:
0035 - const: bus
0036 - const: isi
0037 - const: lcdif
0038 - const: mipi-dsi
0039 - const: mipi-csi
0040
0041 clocks:
0042 minItems: 11
0043 maxItems: 11
0044
0045 clock-names:
0046 items:
0047 - const: disp_axi
0048 - const: disp_apb
0049 - const: disp_axi_root
0050 - const: disp_apb_root
0051 - const: lcdif-axi
0052 - const: lcdif-apb
0053 - const: lcdif-pix
0054 - const: dsi-pclk
0055 - const: dsi-ref
0056 - const: csi-aclk
0057 - const: csi-pclk
0058
0059 required:
0060 - compatible
0061 - reg
0062 - power-domains
0063 - power-domain-names
0064 - clocks
0065 - clock-names
0066
0067 additionalProperties: false
0068
0069 examples:
0070 - |
0071 #include <dt-bindings/clock/imx8mn-clock.h>
0072 #include <dt-bindings/power/imx8mn-power.h>
0073
0074 disp_blk_ctl: blk_ctrl@32e28000 {
0075 compatible = "fsl,imx8mn-disp-blk-ctrl", "syscon";
0076 reg = <0x32e28000 0x100>;
0077 power-domains = <&pgc_dispmix>, <&pgc_dispmix>,
0078 <&pgc_dispmix>, <&pgc_mipi>,
0079 <&pgc_mipi>;
0080 power-domain-names = "bus", "isi", "lcdif", "mipi-dsi",
0081 "mipi-csi";
0082 clocks = <&clk IMX8MN_CLK_DISP_AXI>,
0083 <&clk IMX8MN_CLK_DISP_APB>,
0084 <&clk IMX8MN_CLK_DISP_AXI_ROOT>,
0085 <&clk IMX8MN_CLK_DISP_APB_ROOT>,
0086 <&clk IMX8MN_CLK_DISP_AXI_ROOT>,
0087 <&clk IMX8MN_CLK_DISP_APB_ROOT>,
0088 <&clk IMX8MN_CLK_DISP_PIXEL_ROOT>,
0089 <&clk IMX8MN_CLK_DSI_CORE>,
0090 <&clk IMX8MN_CLK_DSI_PHY_REF>,
0091 <&clk IMX8MN_CLK_CSI1_PHY_REF>,
0092 <&clk IMX8MN_CLK_CAMERA_PIXEL_ROOT>;
0093 clock-names = "disp_axi", "disp_apb", "disp_axi_root", "disp_apb_root",
0094 "lcdif-axi", "lcdif-apb", "lcdif-pix", "dsi-pclk",
0095 "dsi-ref", "csi-aclk", "csi-pclk";
0096 #power-domain-cells = <1>;
0097 };
