0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: NXP i.MX8MM VPU blk-ctrl
0008
0009 maintainers:
0010 - Lucas Stach <l.stach@pengutronix.de>
0011
0012 description:
0013 The i.MX8MM VPU blk-ctrl is a top-level peripheral providing access to
0014 the NoC and ensuring proper power sequencing of the VPU peripherals
0015 located in the VPU domain of the SoC.
0016
0017 properties:
0018 compatible:
0019 items:
0020 - const: fsl,imx8mm-vpu-blk-ctrl
0021 - const: syscon
0022
0023 reg:
0024 maxItems: 1
0025
0026 '#power-domain-cells':
0027 const: 1
0028
0029 power-domains:
0030 minItems: 4
0031 maxItems: 4
0032
0033 power-domain-names:
0034 items:
0035 - const: bus
0036 - const: g1
0037 - const: g2
0038 - const: h1
0039
0040 clocks:
0041 minItems: 3
0042 maxItems: 3
0043
0044 clock-names:
0045 items:
0046 - const: g1
0047 - const: g2
0048 - const: h1
0049
0050 required:
0051 - compatible
0052 - reg
0053 - power-domains
0054 - power-domain-names
0055 - clocks
0056 - clock-names
0057
0058 additionalProperties: false
0059
0060 examples:
0061 - |
0062 #include <dt-bindings/clock/imx8mm-clock.h>
0063 #include <dt-bindings/power/imx8mm-power.h>
0064
0065 vpu_blk_ctrl: blk-ctrl@38330000 {
0066 compatible = "fsl,imx8mm-vpu-blk-ctrl", "syscon";
0067 reg = <0x38330000 0x100>;
0068 power-domains = <&pgc_vpumix>, <&pgc_vpu_g1>,
0069 <&pgc_vpu_g2>, <&pgc_vpu_h1>;
0070 power-domain-names = "bus", "g1", "g2", "h1";
0071 clocks = <&clk IMX8MM_CLK_VPU_G1_ROOT>,
0072 <&clk IMX8MM_CLK_VPU_G2_ROOT>,
0073 <&clk IMX8MM_CLK_VPU_H1_ROOT>;
0074 clock-names = "g1", "g2", "h1";
0075 #power-domain-cells = <1>;
0076 };
