0001 QorIQ DPAA Queue Manager Device Tree Binding
0002
0003 Copyright (C) 2008 - 2014 Freescale Semiconductor Inc.
0004
0005 CONTENTS
0006
0007 - QMan Node
0008 - QMan Private Memory Nodes
0009 - Example
0010
0011 QMan Node
0012
0013 The Queue Manager is part of the Data-Path Acceleration Architecture (DPAA). QMan
0014 supports queuing and QoS scheduling of frames to CPUs, network interfaces and
0015 DPAA logic modules, maintains packet ordering within flows. Besides providing
0016 flow-level queuing, is also responsible for congestion management functions such
0017 as RED/WRED, congestion notifications and tail discards. This binding covers the
0018 CCSR space programming model
0019
0020 PROPERTIES
0021
0022 - compatible
0023 Usage: Required
0024 Value type: <stringlist>
0025 Definition: Must include "fsl,qman"
0026 May include "fsl,<SoC>-qman"
0027
0028 - reg
0029 Usage: Required
0030 Value type: <prop-encoded-array>
0031 Definition: Registers region within the CCSR address space
0032
0033 The QMan revision information is located in the QMAN_IP_REV_1/2 registers which
0034 are located at offsets 0xbf8 and 0xbfc
0035
0036 - interrupts
0037 Usage: Required
0038 Value type: <prop-encoded-array>
0039 Definition: Standard property. The error interrupt
0040
0041 - fsl,qman-portals
0042 Usage: Required
0043 Value type: <phandle>
0044 Definition: Phandle to this QMan instance's portals
0045
0046 - fsl,liodn
0047 Usage: See pamu.txt
0048 Value type: <prop-encoded-array>
0049 Definition: PAMU property used for static LIODN assignment
0050
0051 - fsl,iommu-parent
0052 Usage: See pamu.txt
0053 Value type: <phandle>
0054 Definition: PAMU property used for dynamic LIODN assignment
0055
0056 For additional details about the PAMU/LIODN binding(s) see pamu.txt
0057
0058 - clocks
0059 Usage: See clock-bindings.txt and qoriq-clock.txt
0060 Value type: <prop-encoded-array>
0061 Definition: Reference input clock. Its frequency is half of the
0062 platform clock
0063 - memory-regions
0064 Usage: Required for ARM
0065 Value type: <phandle array>
0066 Definition: List of phandles referencing the QMan private memory
0067 nodes (described below). The qman-fqd node must be
0068 first followed by qman-pfdr node. Only used on ARM
0069
0070 Devices connected to a QMan instance via Direct Connect Portals (DCP) must link
0071 to the respective QMan instance
0072
0073 - fsl,qman
0074 Usage: Required
0075 Value type: <prop-encoded-array>
0076 Description: List of phandle and DCP index pairs, to the QMan instance
0077 to which this device is connected via the DCP
0078
0079 QMan Private Memory Nodes
0080
0081 QMan requires two contiguous range of physical memory used for the backing store
0082 for QMan Frame Queue Descriptor (FQD) and Packed Frame Descriptor Record (PFDR).
0083 This memory is reserved/allocated as a node under the /reserved-memory node.
0084
0085 For additional details about reserved memory regions see reserved-memory.txt
0086
0087 The QMan FQD memory node must be named "qman-fqd"
0088
0089 PROPERTIES
0090
0091 - compatible
0092 Usage: required
0093 Value type: <stringlist>
0094 Definition: PPC platforms: Must include "fsl,qman-fqd"
0095 ARM platforms: Must include "shared-dma-pool"
0096 as well as the "no-map" property
0097
0098 The QMan PFDR memory node must be named "qman-pfdr"
0099
0100 PROPERTIES
0101
0102 - compatible
0103 Usage: required
0104 Value type: <stringlist>
0105 Definition: PPC platforms: Must include "fsl,qman-pfdr"
0106 ARM platforms: Must include "shared-dma-pool"
0107 as well as the "no-map" property
0108
0109 The following constraints are relevant to the FQD and PFDR private memory:
0110 - The size must be 2^(size + 1), with size = 11..29. That is 4 KiB to
0111 1 GiB
0112 - The alignment must be a muliptle of the memory size
0113
0114 The size of the FQD and PFDP must be chosen by observing the hardware features
0115 configured via the Reset Configuration Word (RCW) and that are relevant to a
0116 specific board (e.g. number of MAC(s) pinned-out, number of offline/host command
0117 FMan ports, etc.). The size configured in the DT must reflect the hardware
0118 capabilities and not the specific needs of an application
0119
0120 For additional details about reserved memory regions see reserved-memory.txt
0121
0122 EXAMPLE
0123
0124 The example below shows a QMan FQD and a PFDR dynamic allocation memory nodes
0125
0126 reserved-memory {
0127 #address-cells = <2>;
0128 #size-cells = <2>;
0129 ranges;
0130
0131 qman_fqd: qman-fqd {
0132 compatible = "shared-dma-pool";
0133 size = <0 0x400000>;
0134 alignment = <0 0x400000>;
0135 no-map;
0136 };
0137 qman_pfdr: qman-pfdr {
0138 compatible = "shared-dma-pool";
0139 size = <0 0x2000000>;
0140 alignment = <0 0x2000000>;
0141 no-map;
0142 };
0143 };
0144
0145 The example below shows a (P4080) QMan CCSR-space node
0146
0147 qportals: qman-portals@ff4200000 {
0148 ...
0149 };
0150
0151 clockgen: global-utilities@e1000 {
0152 ...
0153 sysclk: sysclk {
0154 ...
0155 };
0156 ...
0157 platform_pll: platform-pll@c00 {
0158 #clock-cells = <1>;
0159 reg = <0xc00 0x4>;
0160 compatible = "fsl,qoriq-platform-pll-1.0";
0161 clocks = <&sysclk>;
0162 clock-output-names = "platform-pll", "platform-pll-div2";
0163 };
0164 ...
0165 };
0166
0167 crypto@300000 {
0168 ...
0169 fsl,qman = <&qman, 2>;
0170 ...
0171 };
0172
0173 qman: qman@318000 {
0174 compatible = "fsl,qman";
0175 reg = <0x318000 0x1000>;
0176 interrupts = <16 2 1 3>
0177 fsl,liodn = <0x16>;
0178 fsl,qman-portals = <&qportals>;
0179 memory-region = <&qman_fqd &qman_pfdr>;
0180 clocks = <&platform_pll 1>;
0181 };
0182
0183 fman@400000 {
0184 ...
0185 fsl,qman = <&qman, 0>;
0186 ...
0187 };
