0001 QorIQ DPAA Buffer Manager Portals Device Tree Binding
0002
0003 Copyright (C) 2008 - 2014 Freescale Semiconductor Inc.
0004
0005 CONTENTS
0006
0007 - BMan Portal
0008 - Example
0009
0010 BMan Portal Node
0011
0012 Portals are memory mapped interfaces to BMan that allow low-latency, lock-less
0013 interaction by software running on processor cores, accelerators and network
0014 interfaces with the BMan
0015
0016 PROPERTIES
0017
0018 - compatible
0019 Usage: Required
0020 Value type: <stringlist>
0021 Definition: Must include "fsl,bman-portal-<hardware revision>"
0022 May include "fsl,<SoC>-bman-portal" or "fsl,bman-portal"
0023
0024 - reg
0025 Usage: Required
0026 Value type: <prop-encoded-array>
0027 Definition: Two regions. The first is the cache-enabled region of
0028 the portal. The second is the cache-inhibited region of
0029 the portal
0030
0031 - interrupts
0032 Usage: Required
0033 Value type: <prop-encoded-array>
0034 Definition: Standard property
0035
0036 EXAMPLE
0037
0038 The example below shows a (P4080) BMan portals container/bus node with two portals
0039
0040 bman-portals@ff4000000 {
0041 #address-cells = <1>;
0042 #size-cells = <1>;
0043 compatible = "simple-bus";
0044 ranges = <0 0xf 0xf4000000 0x200000>;
0045
0046 bman-portal@0 {
0047 compatible = "fsl,bman-portal-1.0.0", "fsl,bman-portal";
0048 reg = <0x0 0x4000>, <0x100000 0x1000>;
0049 interrupts = <105 2 0 0>;
0050 };
0051 bman-portal@4000 {
0052 compatible = "fsl,bman-portal-1.0.0", "fsl,bman-portal";
0053 reg = <0x4000 0x4000>, <0x101000 0x1000>;
0054 interrupts = <107 2 0 0>;
0055 };
0056 };
