0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/serial/samsung_uart.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Samsung S3C, S5P, Exynos, and S5L (Apple SoC) SoC UART Controller
0008
0009 maintainers:
0010 - Krzysztof Kozlowski <krzk@kernel.org>
0011 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
0012
0013 description: |+
0014 Each Samsung UART should have an alias correctly numbered in the "aliases"
0015 node, according to serialN format, where N is the port number (non-negative
0016 decimal integer) as specified by User's Manual of respective SoC.
0017
0018 properties:
0019 compatible:
0020 items:
0021 - enum:
0022 - apple,s5l-uart
0023 - axis,artpec8-uart
0024 - samsung,s3c2410-uart
0025 - samsung,s3c2412-uart
0026 - samsung,s3c2440-uart
0027 - samsung,s3c6400-uart
0028 - samsung,s5pv210-uart
0029 - samsung,exynos4210-uart
0030 - samsung,exynos5433-uart
0031 - samsung,exynos850-uart
0032
0033 reg:
0034 maxItems: 1
0035
0036 reg-io-width:
0037 description: |
0038 The size (in bytes) of the IO accesses that should be performed
0039 on the device.
0040 $ref: /schemas/types.yaml#/definitions/uint32
0041 enum: [ 1, 4 ]
0042
0043 clocks:
0044 minItems: 2
0045 maxItems: 5
0046
0047 clock-names:
0048 description: N = 0 is allowed for SoCs without internal baud clock mux.
0049 minItems: 2
0050 items:
0051 - const: uart
0052 - pattern: '^clk_uart_baud[0-3]$'
0053 - pattern: '^clk_uart_baud[0-3]$'
0054 - pattern: '^clk_uart_baud[0-3]$'
0055 - pattern: '^clk_uart_baud[0-3]$'
0056
0057 dmas:
0058 items:
0059 - description: DMA controller phandle and request line for RX
0060 - description: DMA controller phandle and request line for TX
0061
0062 dma-names:
0063 items:
0064 - const: rx
0065 - const: tx
0066
0067 interrupts:
0068 description: RX interrupt and optionally TX interrupt.
0069 minItems: 1
0070 maxItems: 2
0071
0072 samsung,uart-fifosize:
0073 description: The fifo size supported by the UART channel.
0074 $ref: /schemas/types.yaml#/definitions/uint32
0075 enum: [16, 64, 256]
0076
0077 required:
0078 - compatible
0079 - clocks
0080 - clock-names
0081 - interrupts
0082 - reg
0083
0084 unevaluatedProperties: false
0085
0086 allOf:
0087 - $ref: serial.yaml#
0088
0089 - if:
0090 properties:
0091 compatible:
0092 contains:
0093 enum:
0094 - samsung,s3c2410-uart
0095 - samsung,s5pv210-uart
0096 then:
0097 properties:
0098 clocks:
0099 minItems: 2
0100 maxItems: 3
0101 clock-names:
0102 minItems: 2
0103 items:
0104 - const: uart
0105 - pattern: '^clk_uart_baud[0-1]$'
0106 - pattern: '^clk_uart_baud[0-1]$'
0107
0108 - if:
0109 properties:
0110 compatible:
0111 contains:
0112 enum:
0113 - apple,s5l-uart
0114 - axis,artpec8-uart
0115 - samsung,exynos4210-uart
0116 - samsung,exynos5433-uart
0117 then:
0118 properties:
0119 clocks:
0120 maxItems: 2
0121 clock-names:
0122 items:
0123 - const: uart
0124 - const: clk_uart_baud0
0125
0126 examples:
0127 - |
0128 #include <dt-bindings/clock/samsung,s3c64xx-clock.h>
0129
0130 uart0: serial@7f005000 {
0131 compatible = "samsung,s3c6400-uart";
0132 reg = <0x7f005000 0x100>;
0133 interrupt-parent = <&vic1>;
0134 interrupts = <5>;
0135 clock-names = "uart", "clk_uart_baud2",
0136 "clk_uart_baud3";
0137 clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
0138 <&clocks SCLK_UART>;
0139 samsung,uart-fifosize = <16>;
0140 };