0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: "http://devicetree.org/schemas/serial/renesas,sci.yaml#"
0005 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
0006
0007 title: Renesas Serial Communication Interface
0008
0009 maintainers:
0010 - Geert Uytterhoeven <geert+renesas@glider.be>
0011
0012 allOf:
0013 - $ref: serial.yaml#
0014
0015 properties:
0016 compatible:
0017 oneOf:
0018 - items:
0019 - enum:
0020 - renesas,r9a07g043-sci # RZ/G2UL
0021 - renesas,r9a07g044-sci # RZ/G2{L,LC}
0022 - renesas,r9a07g054-sci # RZ/V2L
0023 - const: renesas,sci # generic SCI compatible UART
0024
0025 - items:
0026 - const: renesas,sci # generic SCI compatible UART
0027
0028 reg:
0029 maxItems: 1
0030
0031 interrupts:
0032 items:
0033 - description: Error interrupt
0034 - description: Receive buffer full interrupt
0035 - description: Transmit buffer empty interrupt
0036 - description: Transmit end interrupt
0037
0038 interrupt-names:
0039 items:
0040 - const: eri
0041 - const: rxi
0042 - const: txi
0043 - const: tei
0044
0045 clocks:
0046 minItems: 1
0047 maxItems: 2
0048
0049 clock-names:
0050 minItems: 1
0051 maxItems: 2
0052 items:
0053 enum:
0054 - fck # UART functional clock
0055 - sck # optional external clock input
0056
0057 uart-has-rtscts: false
0058
0059 required:
0060 - compatible
0061 - reg
0062 - interrupts
0063 - clocks
0064 - clock-names
0065
0066 if:
0067 properties:
0068 compatible:
0069 contains:
0070 enum:
0071 - renesas,r9a07g043-sci
0072 - renesas,r9a07g044-sci
0073 - renesas,r9a07g054-sci
0074 then:
0075 properties:
0076 resets:
0077 maxItems: 1
0078
0079 power-domains:
0080 maxItems: 1
0081
0082 required:
0083 - resets
0084 - power-domains
0085
0086 unevaluatedProperties: false
0087
0088 examples:
0089 - |
0090 #include <dt-bindings/clock/r9a07g044-cpg.h>
0091 #include <dt-bindings/interrupt-controller/arm-gic.h>
0092
0093 aliases {
0094 serial0 = &sci0;
0095 };
0096
0097 sci0: serial@1004d000 {
0098 compatible = "renesas,r9a07g044-sci", "renesas,sci";
0099 reg = <0x1004d000 0x400>;
0100 interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
0101 <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
0102 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
0103 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
0104 interrupt-names = "eri", "rxi", "txi", "tei";
0105 clocks = <&cpg CPG_MOD R9A07G044_SCI0_CLKP>;
0106 clock-names = "fck";
0107 power-domains = <&cpg>;
0108 resets = <&cpg R9A07G044_SCI0_RST>;
0109 };