0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: "http://devicetree.org/schemas/serial/renesas,hscif.yaml#"
0005 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
0006
0007 title: Renesas High Speed Serial Communication Interface with FIFO (HSCIF)
0008
0009 maintainers:
0010 - Geert Uytterhoeven <geert+renesas@glider.be>
0011
0012 allOf:
0013 - $ref: serial.yaml#
0014
0015 properties:
0016 compatible:
0017 oneOf:
0018 - items:
0019 - enum:
0020 - renesas,hscif-r8a7778 # R-Car M1
0021 - renesas,hscif-r8a7779 # R-Car H1
0022 - const: renesas,rcar-gen1-hscif # R-Car Gen1
0023 - const: renesas,hscif # generic HSCIF compatible UART
0024
0025 - items:
0026 - enum:
0027 - renesas,hscif-r8a7742 # RZ/G1H
0028 - renesas,hscif-r8a7743 # RZ/G1M
0029 - renesas,hscif-r8a7744 # RZ/G1N
0030 - renesas,hscif-r8a7745 # RZ/G1E
0031 - renesas,hscif-r8a77470 # RZ/G1C
0032 - renesas,hscif-r8a7790 # R-Car H2
0033 - renesas,hscif-r8a7791 # R-Car M2-W
0034 - renesas,hscif-r8a7792 # R-Car V2H
0035 - renesas,hscif-r8a7793 # R-Car M2-N
0036 - renesas,hscif-r8a7794 # R-Car E2
0037 - const: renesas,rcar-gen2-hscif # R-Car Gen2 and RZ/G1
0038 - const: renesas,hscif # generic HSCIF compatible UART
0039
0040 - items:
0041 - enum:
0042 - renesas,hscif-r8a774a1 # RZ/G2M
0043 - renesas,hscif-r8a774b1 # RZ/G2N
0044 - renesas,hscif-r8a774c0 # RZ/G2E
0045 - renesas,hscif-r8a774e1 # RZ/G2H
0046 - renesas,hscif-r8a7795 # R-Car H3
0047 - renesas,hscif-r8a7796 # R-Car M3-W
0048 - renesas,hscif-r8a77961 # R-Car M3-W+
0049 - renesas,hscif-r8a77965 # R-Car M3-N
0050 - renesas,hscif-r8a77970 # R-Car V3M
0051 - renesas,hscif-r8a77980 # R-Car V3H
0052 - renesas,hscif-r8a77990 # R-Car E3
0053 - renesas,hscif-r8a77995 # R-Car D3
0054 - const: renesas,rcar-gen3-hscif # R-Car Gen3 and RZ/G2
0055 - const: renesas,hscif # generic HSCIF compatible UART
0056
0057 - items:
0058 - enum:
0059 - renesas,hscif-r8a779a0 # R-Car V3U
0060 - renesas,hscif-r8a779f0 # R-Car S4-8
0061 - renesas,hscif-r8a779g0 # R-Car V4H
0062 - const: renesas,rcar-gen4-hscif # R-Car Gen4
0063 - const: renesas,hscif # generic HSCIF compatible UART
0064
0065 reg:
0066 maxItems: 1
0067
0068 interrupts:
0069 maxItems: 1
0070
0071 clocks:
0072 minItems: 1
0073 maxItems: 4
0074
0075 clock-names:
0076 minItems: 1
0077 maxItems: 4
0078 items:
0079 enum:
0080 - fck # UART functional clock
0081 - hsck # optional external clock input
0082 - brg_int # optional internal clock source for BRG frequency divider
0083 - scif_clk # optional external clock source for BRG frequency divider
0084
0085 power-domains:
0086 maxItems: 1
0087
0088 resets:
0089 maxItems: 1
0090
0091 dmas:
0092 minItems: 2
0093 maxItems: 4
0094 description:
0095 Must contain a list of pairs of references to DMA specifiers, one for
0096 transmission, and one for reception.
0097
0098 dma-names:
0099 minItems: 2
0100 maxItems: 4
0101 items:
0102 enum:
0103 - tx
0104 - rx
0105
0106 required:
0107 - compatible
0108 - reg
0109 - interrupts
0110 - clocks
0111 - clock-names
0112 - power-domains
0113
0114 unevaluatedProperties: false
0115
0116 if:
0117 properties:
0118 compatible:
0119 contains:
0120 enum:
0121 - renesas,rcar-gen2-hscif
0122 - renesas,rcar-gen3-hscif
0123 - renesas,rcar-gen4-hscif
0124 then:
0125 required:
0126 - resets
0127
0128 examples:
0129 - |
0130 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
0131 #include <dt-bindings/interrupt-controller/arm-gic.h>
0132 #include <dt-bindings/power/r8a7795-sysc.h>
0133 aliases {
0134 serial1 = &hscif1;
0135 };
0136
0137 hscif1: serial@e6550000 {
0138 compatible = "renesas,hscif-r8a7795", "renesas,rcar-gen3-hscif",
0139 "renesas,hscif";
0140 reg = <0xe6550000 96>;
0141 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
0142 clocks = <&cpg CPG_MOD 519>, <&cpg CPG_CORE R8A7795_CLK_S3D1>,
0143 <&scif_clk>;
0144 clock-names = "fck", "brg_int", "scif_clk";
0145 dmas = <&dmac1 0x33>, <&dmac1 0x32>, <&dmac2 0x33>, <&dmac2 0x32>;
0146 dma-names = "tx", "rx", "tx", "rx";
0147 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
0148 resets = <&cpg 519>;
0149 uart-has-rtscts;
0150 };