0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/serial/nvidia,tegra194-tcu.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: NVIDIA Tegra Combined UART (TCU)
0008
0009 maintainers:
0010 - Thierry Reding <thierry.reding@gmail.com>
0011 - Jonathan Hunter <jonathanh@nvidia.com>
0012
0013 description:
0014 The TCU is a system for sharing a hardware UART instance among multiple
0015 systems within the Tegra SoC. It is implemented through a mailbox-
0016 based protocol where each "virtual UART" has a pair of mailboxes, one
0017 for transmitting and one for receiving, that is used to communicate
0018 with the hardware implementing the TCU.
0019
0020 properties:
0021 $nodename:
0022 pattern: "^serial(@.*)?$"
0023
0024 compatible:
0025 oneOf:
0026 - const: nvidia,tegra194-tcu
0027 - items:
0028 - enum:
0029 - nvidia,tegra234-tcu
0030 - const: nvidia,tegra194-tcu
0031
0032 mbox-names:
0033 items:
0034 - const: rx
0035 - const: tx
0036
0037 mboxes:
0038 description: |
0039 List of phandles to mailbox channels used for receiving and
0040 transmitting data from and to the hardware UART.
0041 items:
0042 - description: mailbox for receiving data from hardware UART
0043 - description: mailbox for transmitting data to hardware UART
0044
0045 required:
0046 - compatible
0047 - mbox-names
0048 - mboxes
0049
0050 additionalProperties: false
0051
0052 examples:
0053 - |
0054 #include <dt-bindings/mailbox/tegra186-hsp.h>
0055
0056 tcu: serial {
0057 compatible = "nvidia,tegra194-tcu";
0058 mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_SM 0>,
0059 <&hsp_aon TEGRA_HSP_MBOX_TYPE_SM 1>;
0060 mbox-names = "rx", "tx";
0061 };
