bindings/serial/mediatek%2Cuart.yaml

0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/serial/mediatek,uart.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: MediaTek Universal Asynchronous Receiver/Transmitter (UART)
0008
0009 maintainers:
0010   - Matthias Brugger <matthias.bgg@gmail.com>
0011
0012 allOf:
0013   - $ref: serial.yaml#
0014
0015 description: |
0016   The MediaTek UART is based on the basic 8250 UART and compatible
0017   with 16550A, with enhancements for high speed baud rates and
0018   support for DMA.
0019
0020 properties:
0021   compatible:
0022     oneOf:
0023       - const: mediatek,mt6577-uart
0024       - items:
0025           - enum:
0026               - mediatek,mt2701-uart
0027               - mediatek,mt2712-uart
0028               - mediatek,mt6580-uart
0029               - mediatek,mt6582-uart
0030               - mediatek,mt6589-uart
0031               - mediatek,mt6755-uart
0032               - mediatek,mt6765-uart
0033               - mediatek,mt6779-uart
0034               - mediatek,mt6795-uart
0035               - mediatek,mt6797-uart
0036               - mediatek,mt7622-uart
0037               - mediatek,mt7623-uart
0038               - mediatek,mt7629-uart
0039               - mediatek,mt7986-uart
0040               - mediatek,mt8127-uart
0041               - mediatek,mt8135-uart
0042               - mediatek,mt8173-uart
0043               - mediatek,mt8183-uart
0044               - mediatek,mt8186-uart
0045               - mediatek,mt8192-uart
0046               - mediatek,mt8195-uart
0047               - mediatek,mt8516-uart
0048           - const: mediatek,mt6577-uart
0049
0050   reg:
0051     description: The base address of the UART register bank
0052     maxItems: 1
0053
0054   clocks:
0055     minItems: 1
0056     items:
0057       - description: The clock the baudrate is derived from
0058       - description: The bus clock for register accesses
0059
0060   clock-names:
0061     minItems: 1
0062     items:
0063       - const: baud
0064       - const: bus
0065
0066   dmas:
0067     items:
0068       - description: phandle to TX DMA
0069       - description: phandle to RX DMA
0070
0071   dma-names:
0072     items:
0073       - const: tx
0074       - const: rx
0075
0076   interrupts:
0077     minItems: 1
0078     maxItems: 2
0079
0080   interrupt-names:
0081     description:
0082       The UART interrupt and optionally the RX in-band wakeup interrupt.
0083     minItems: 1
0084     items:
0085       - const: uart
0086       - const: wakeup
0087
0088   pinctrl-0: true
0089   pinctrl-1: true
0090
0091   pinctrl-names:
0092     minItems: 1
0093     items:
0094       - const: default
0095       - const: sleep
0096
0097 required:
0098   - compatible
0099   - reg
0100   - clocks
0101   - interrupts
0102
0103 unevaluatedProperties: false
0104
0105 examples:
0106   - |
0107     #include <dt-bindings/interrupt-controller/arm-gic.h>
0108
0109     serial@11006000 {
0110         compatible = "mediatek,mt6589-uart", "mediatek,mt6577-uart";
0111         reg = <0x11006000 0x400>;
0112         interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>,
0113                      <GIC_SPI 52 IRQ_TYPE_EDGE_FALLING>;
0114         interrupt-names = "uart", "wakeup";
0115         clocks = <&uart_clk>, <&bus_clk>;
0116         clock-names = "baud", "bus";
0117         pinctrl-0 = <&uart_pin>;
0118         pinctrl-1 = <&uart_pin_sleep>;
0119         pinctrl-names = "default", "sleep";
0120     };