0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/rtc/xlnx,zynqmp-rtc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Xilinx Zynq Ultrascale+ MPSoC Real Time Clock
0008
0009 description:
0010 RTC controller for the Xilinx Zynq MPSoC Real Time Clock.
0011 The RTC controller has separate IRQ lines for seconds and alarm.
0012
0013 maintainers:
0014 - Michal Simek <michal.simek@xilinx.com>
0015
0016 allOf:
0017 - $ref: rtc.yaml#
0018
0019 properties:
0020 compatible:
0021 const: xlnx,zynqmp-rtc
0022
0023 reg:
0024 maxItems: 1
0025
0026 clocks:
0027 maxItems: 1
0028
0029 clock-names:
0030 items:
0031 - const: rtc
0032
0033 interrupts:
0034 maxItems: 2
0035
0036 interrupt-names:
0037 items:
0038 - const: alarm
0039 - const: sec
0040
0041 calibration:
0042 description: |
0043 calibration value for 1 sec period which will
0044 be programmed directly to calibration register.
0045 $ref: /schemas/types.yaml#/definitions/uint32
0046 minimum: 0x1
0047 maximum: 0x1FFFFF
0048 default: 0x198233
0049 deprecated: true
0050
0051 required:
0052 - compatible
0053 - reg
0054 - interrupts
0055 - interrupt-names
0056
0057 additionalProperties: false
0058
0059 examples:
0060 - |
0061 soc {
0062 #address-cells = <2>;
0063 #size-cells = <2>;
0064
0065 rtc: rtc@ffa60000 {
0066 compatible = "xlnx,zynqmp-rtc";
0067 reg = <0x0 0xffa60000 0x0 0x100>;
0068 interrupt-parent = <&gic>;
0069 interrupts = <0 26 4>, <0 27 4>;
0070 interrupt-names = "alarm", "sec";
0071 calibration = <0x198233>;
0072 clock-names = "rtc";
0073 clocks = <&rtc_clk>;
0074 };
0075 };
