0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/rtc/renesas,sh-rtc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Real Time Clock for Renesas SH and ARM SoCs
0008
0009 maintainers:
0010 - Chris Brandt <chris.brandt@renesas.com>
0011 - Geert Uytterhoeven <geert+renesas@glider.be>
0012
0013 properties:
0014 compatible:
0015 items:
0016 - const: renesas,r7s72100-rtc # RZ/A1H
0017 - const: renesas,sh-rtc
0018
0019 reg:
0020 maxItems: 1
0021
0022 interrupts:
0023 maxItems: 3
0024
0025 interrupt-names:
0026 items:
0027 - const: alarm
0028 - const: period
0029 - const: carry
0030
0031 clocks:
0032 # The functional clock source for the RTC controller must be listed
0033 # first (if it exists). Additionally, potential clock counting sources
0034 # are to be listed.
0035 minItems: 1
0036 maxItems: 4
0037
0038 clock-names:
0039 # The functional clock must be labeled as "fck". Other clocks
0040 # may be named in accordance to the SoC hardware manuals.
0041 minItems: 1
0042 maxItems: 4
0043 items:
0044 enum: [ fck, rtc_x1, rtc_x3, extal ]
0045
0046 power-domains:
0047 maxItems: 1
0048
0049 required:
0050 - compatible
0051 - reg
0052 - interrupts
0053 - interrupt-names
0054 - clocks
0055 - clock-names
0056 - power-domains
0057
0058 additionalProperties: false
0059
0060 examples:
0061 - |
0062 #include <dt-bindings/clock/r7s72100-clock.h>
0063 #include <dt-bindings/interrupt-controller/arm-gic.h>
0064 #include <dt-bindings/interrupt-controller/irq.h>
0065
0066 rtc: rtc@fcff1000 {
0067 compatible = "renesas,r7s72100-rtc", "renesas,sh-rtc";
0068 reg = <0xfcff1000 0x2e>;
0069 interrupts = <GIC_SPI 276 IRQ_TYPE_EDGE_RISING>,
0070 <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>,
0071 <GIC_SPI 278 IRQ_TYPE_EDGE_RISING>;
0072 interrupt-names = "alarm", "period", "carry";
0073 clocks = <&mstp6_clks R7S72100_CLK_RTC>, <&rtc_x1_clk>,
0074 <&rtc_x3_clk>, <&extal_clk>;
0075 power-domains = <&cpg_clocks>;
0076 clock-names = "fck", "rtc_x1", "rtc_x3", "extal";
0077 };
