0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/rtc/microchip,mfps-rtc.yaml#
0005
0006 $schema: http://devicetree.org/meta-schemas/core.yaml#
0007
0008 title: Microchip PolarFire Soc (MPFS) RTC Device Tree Bindings
0009
0010 allOf:
0011 - $ref: rtc.yaml#
0012
0013 maintainers:
0014 - Daire McNamara <daire.mcnamara@microchip.com>
0015 - Lewis Hanly <lewis.hanly@microchip.com>
0016
0017 properties:
0018 compatible:
0019 enum:
0020 - microchip,mpfs-rtc
0021
0022 reg:
0023 maxItems: 1
0024
0025 interrupts:
0026 items:
0027 - description: |
0028 RTC_WAKEUP interrupt
0029 - description: |
0030 RTC_MATCH, asserted when the content of the Alarm register is equal
0031 to that of the RTC's count register.
0032
0033 clocks:
0034 items:
0035 - description: |
0036 AHB clock
0037 - description: |
0038 Reference clock: divided by the prescaler to create a time-based
0039 strobe (typically 1 Hz) for the calendar counter. By default, the rtc
0040 on the PolarFire SoC shares it's reference with MTIMER so this will
0041 be a 1 MHz clock.
0042
0043 clock-names:
0044 items:
0045 - const: rtc
0046 - const: rtcref
0047
0048 required:
0049 - compatible
0050 - reg
0051 - interrupts
0052 - clocks
0053 - clock-names
0054
0055 additionalProperties: false
0056
0057 examples:
0058 - |
0059 #include "dt-bindings/clock/microchip,mpfs-clock.h"
0060 rtc@20124000 {
0061 compatible = "microchip,mpfs-rtc";
0062 reg = <0x20124000 0x1000>;
0063 clocks = <&clkcfg CLK_RTC>, <&clkcfg CLK_RTCREF>;
0064 clock-names = "rtc", "rtcref";
0065 interrupts = <80>, <81>;
0066 };
0067 ...
