0001 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: OMAP4+ Remoteproc Devices
0008
0009 maintainers:
0010 - Suman Anna <s-anna@ti.com>
0011
0012 description:
0013 The OMAP family of SoCs usually have one or more slave processor sub-systems
0014 that are used to offload some of the processor-intensive tasks, or to manage
0015 other hardware accelerators, for achieving various system level goals.
0016
0017 The processor cores in the sub-system are usually behind an IOMMU, and may
0018 contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2
0019 caches, an Interrupt Controller, a Cache Controller etc.
0020
0021 The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor
0022 sub-system. The DSP processor sub-system can contain any of the TI's C64x,
0023 C66x or C67x family of DSP cores as the main execution unit. The IPU processor
0024 sub-system usually contains either a Dual-Core Cortex-M3 or Dual-Core
0025 Cortex-M4 processors.
0026
0027 Each remote processor sub-system is represented as a single DT node. Each node
0028 has a number of required or optional properties that enable the OS running on
0029 the host processor (MPU) to perform the device management of the remote
0030 processor and to communicate with the remote processor. The various properties
0031 can be classified as constant or variable. The constant properties are
0032 dictated by the SoC and does not change from one board to another having the
0033 same SoC. Examples of constant properties include 'iommus', 'reg'. The
0034 variable properties are dictated by the system integration aspects such as
0035 memory on the board, or configuration used within the corresponding firmware
0036 image. Examples of variable properties include 'mboxes', 'memory-region',
0037 'timers', 'watchdog-timers' etc.
0038
0039 properties:
0040 compatible:
0041 enum:
0042 - ti,omap4-dsp
0043 - ti,omap5-dsp
0044 - ti,dra7-dsp
0045 - ti,omap4-ipu
0046 - ti,omap5-ipu
0047 - ti,dra7-ipu
0048
0049 iommus:
0050 minItems: 1
0051 maxItems: 2
0052 description: |
0053 phandles to OMAP IOMMU nodes, that need to be programmed
0054 for this remote processor to access any external RAM memory or
0055 other peripheral device address spaces. This property usually
0056 has only a single phandle. Multiple phandles are used only in
0057 cases where the sub-system has different ports for different
0058 sub-modules within the processor sub-system (eg: DRA7 DSPs),
0059 and need the same programming in both the MMUs.
0060
0061 mboxes:
0062 minItems: 1
0063 maxItems: 2
0064 description: |
0065 OMAP Mailbox specifier denoting the sub-mailbox, to be used for
0066 communication with the remote processor. The specifier format is
0067 as per the bindings,
0068 Documentation/devicetree/bindings/mailbox/ti,omap-mailbox.yaml
0069 This property should match with the sub-mailbox node used in
0070 the firmware image.
0071
0072 clocks:
0073 maxItems: 1
0074 description: |
0075 Main functional clock for the remote processor
0076
0077 resets:
0078 minItems: 1
0079 maxItems: 2
0080 description: |
0081 Reset handles for the remote processor
0082
0083 firmware-name:
0084 description: |
0085 Default name of the firmware to load to the remote processor.
0086
0087 # Optional properties:
0088 # --------------------
0089 # Some of these properties are mandatory on some SoCs, and some are optional
0090 # depending on the configuration of the firmware image to be executed on the
0091 # remote processor. The conditions are mentioned for each property.
0092 #
0093 # The following are the optional properties:
0094
0095 memory-region:
0096 maxItems: 1
0097 description: |
0098 phandle to the reserved memory node to be associated
0099 with the remoteproc device. The reserved memory node
0100 can be a CMA memory node, and should be defined as
0101 per the bindings,
0102 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
0103
0104 reg:
0105 description: |
0106 Address space for any remoteproc memories present on
0107 the SoC. Should contain an entry for each value in
0108 'reg-names'. These are mandatory for all DSP and IPU
0109 processors that have them (OMAP4/OMAP5 DSPs do not have
0110 any RAMs)
0111
0112 reg-names:
0113 description: |
0114 Required names for each of the address spaces defined in
0115 the 'reg' property. Expects the names from the following
0116 list, in the specified order, each representing the corresponding
0117 internal RAM memory region.
0118 minItems: 1
0119 items:
0120 - const: l2ram
0121 - const: l1pram
0122 - const: l1dram
0123
0124 ti,bootreg:
0125 $ref: /schemas/types.yaml#/definitions/phandle-array
0126 items:
0127 - items:
0128 - description: phandle to the System Control Configuration region
0129 - description: register offset of the boot address register
0130 - description: the bit shift within the register
0131 description:
0132 This property is required for all the DSP instances on OMAP4, OMAP5
0133 and DRA7xx SoCs.
0134
0135 ti,autosuspend-delay-ms:
0136 description: |
0137 Custom autosuspend delay for the remoteproc in milliseconds.
0138 Recommended values is preferable to be in the order of couple
0139 of seconds. A negative value can also be used to disable the
0140 autosuspend behavior.
0141
0142 ti,timers:
0143 $ref: /schemas/types.yaml#/definitions/phandle-array
0144 items:
0145 maxItems: 1
0146 description: |
0147 One or more phandles to OMAP DMTimer nodes, that serve
0148 as System/Tick timers for the OS running on the remote
0149 processors. This will usually be a single timer if the
0150 processor sub-system is running in SMP mode, or one per
0151 core in the processor sub-system. This can also be used
0152 to reserve specific timers to be dedicated to the
0153 remote processors.
0154
0155 This property is mandatory on remote processors requiring
0156 external tick wakeup, and to support Power Management
0157 features. The timers to be used should match with the
0158 timers used in the firmware image.
0159
0160 ti,watchdog-timers:
0161 $ref: /schemas/types.yaml#/definitions/phandle-array
0162 items:
0163 maxItems: 1
0164 description: |
0165 One or more phandles to OMAP DMTimer nodes, used to
0166 serve as Watchdog timers for the processor cores. This
0167 will usually be one per executing processor core, even
0168 if the processor sub-system is running a SMP OS.
0169
0170 The timers to be used should match with the watchdog
0171 timers used in the firmware image.
0172
0173 if:
0174 properties:
0175 compatible:
0176 enum:
0177 - ti,dra7-dsp
0178 then:
0179 properties:
0180 reg:
0181 minItems: 3
0182 maxItems: 3
0183 required:
0184 - reg
0185 - reg-names
0186 - ti,bootreg
0187
0188 else:
0189 if:
0190 properties:
0191 compatible:
0192 enum:
0193 - ti,omap4-ipu
0194 - ti,omap5-ipu
0195 - ti,dra7-ipu
0196 then:
0197 properties:
0198 reg:
0199 minItems: 1
0200 maxItems: 1
0201 ti,bootreg: false
0202 required:
0203 - reg
0204 - reg-names
0205
0206 else:
0207 properties:
0208 reg: false
0209 required:
0210 - ti,bootreg
0211
0212 required:
0213 - compatible
0214 - iommus
0215 - mboxes
0216 - clocks
0217 - resets
0218 - firmware-name
0219
0220 additionalProperties: false
0221
0222 examples:
0223 - |
0224
0225 //Example 1: OMAP4 DSP
0226
0227 /* DSP Reserved Memory node */
0228 #include <dt-bindings/clock/omap4.h>
0229 reserved-memory {
0230 #address-cells = <1>;
0231 #size-cells = <1>;
0232
0233 dsp_memory_region: dsp-memory@98000000 {
0234 compatible = "shared-dma-pool";
0235 reg = <0x98000000 0x800000>;
0236 reusable;
0237 };
0238 };
0239
0240 /* DSP node */
0241 ocp {
0242 dsp: dsp {
0243 compatible = "ti,omap4-dsp";
0244 ti,bootreg = <&scm_conf 0x304 0>;
0245 iommus = <&mmu_dsp>;
0246 mboxes = <&mailbox &mbox_dsp>;
0247 memory-region = <&dsp_memory_region>;
0248 ti,timers = <&timer5>;
0249 ti,watchdog-timers = <&timer6>;
0250 clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>;
0251 resets = <&prm_tesla 0>, <&prm_tesla 1>;
0252 firmware-name = "omap4-dsp-fw.xe64T";
0253 };
0254 };
0255
0256 - |+
0257
0258 //Example 2: OMAP5 IPU
0259
0260 /* IPU Reserved Memory node */
0261 #include <dt-bindings/clock/omap5.h>
0262 reserved-memory {
0263 #address-cells = <2>;
0264 #size-cells = <2>;
0265
0266 ipu_memory_region: ipu-memory@95800000 {
0267 compatible = "shared-dma-pool";
0268 reg = <0 0x95800000 0 0x3800000>;
0269 reusable;
0270 };
0271 };
0272
0273 /* IPU node */
0274 ocp {
0275 #address-cells = <1>;
0276 #size-cells = <1>;
0277
0278 ipu: ipu@55020000 {
0279 compatible = "ti,omap5-ipu";
0280 reg = <0x55020000 0x10000>;
0281 reg-names = "l2ram";
0282 iommus = <&mmu_ipu>;
0283 mboxes = <&mailbox &mbox_ipu>;
0284 memory-region = <&ipu_memory_region>;
0285 ti,timers = <&timer3>, <&timer4>;
0286 ti,watchdog-timers = <&timer9>, <&timer11>;
0287 clocks = <&ipu_clkctrl OMAP5_MMU_IPU_CLKCTRL 0>;
0288 resets = <&prm_core 2>;
0289 firmware-name = "omap5-ipu-fw.xem4";
0290 };
0291 };
0292
0293 - |+
0294
0295 //Example 3: DRA7xx/AM57xx DSP
0296
0297 /* DSP1 Reserved Memory node */
0298 #include <dt-bindings/clock/dra7.h>
0299 reserved-memory {
0300 #address-cells = <2>;
0301 #size-cells = <2>;
0302
0303 dsp1_memory_region: dsp1-memory@99000000 {
0304 compatible = "shared-dma-pool";
0305 reg = <0x0 0x99000000 0x0 0x4000000>;
0306 reusable;
0307 };
0308 };
0309
0310 /* DSP1 node */
0311 ocp {
0312 #address-cells = <1>;
0313 #size-cells = <1>;
0314
0315 dsp1: dsp@40800000 {
0316 compatible = "ti,dra7-dsp";
0317 reg = <0x40800000 0x48000>,
0318 <0x40e00000 0x8000>,
0319 <0x40f00000 0x8000>;
0320 reg-names = "l2ram", "l1pram", "l1dram";
0321 ti,bootreg = <&scm_conf 0x55c 0>;
0322 iommus = <&mmu0_dsp1>, <&mmu1_dsp1>;
0323 mboxes = <&mailbox5 &mbox_dsp1_ipc3x>;
0324 memory-region = <&dsp1_memory_region>;
0325 ti,timers = <&timer5>;
0326 ti,watchdog-timers = <&timer10>;
0327 resets = <&prm_dsp1 0>;
0328 clocks = <&dsp1_clkctrl DRA7_DSP1_MMU0_DSP1_CLKCTRL 0>;
0329 firmware-name = "dra7-dsp1-fw.xe66";
0330 };
0331 };
