0001 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: TI K3 DSP devices
0008
0009 maintainers:
0010 - Suman Anna <s-anna@ti.com>
0011
0012 description: |
0013 The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems
0014 that are used to offload some of the processor-intensive tasks or algorithms,
0015 for achieving various system level goals.
0016
0017 These processor sub-systems usually contain additional sub-modules like
0018 L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory
0019 controller, a dedicated local power/sleep controller etc. The DSP processor
0020 cores in the K3 SoCs are usually either a TMS320C66x CorePac processor or a
0021 TMS320C71x CorePac processor.
0022
0023 Each DSP Core sub-system is represented as a single DT node. Each node has a
0024 number of required or optional properties that enable the OS running on the
0025 host processor (Arm CorePac) to perform the device management of the remote
0026 processor and to communicate with the remote processor.
0027
0028 allOf:
0029 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
0030
0031 properties:
0032 compatible:
0033 enum:
0034 - ti,j721e-c66-dsp
0035 - ti,j721e-c71-dsp
0036 - ti,j721s2-c71-dsp
0037 description:
0038 Use "ti,j721e-c66-dsp" for C66x DSPs on K3 J721E SoCs
0039 Use "ti,j721e-c71-dsp" for C71x DSPs on K3 J721E SoCs
0040 Use "ti,j721s2-c71-dsp" for C71x DSPs on K3 J721S2 SoCs
0041
0042 resets:
0043 description: |
0044 Should contain the phandle to the reset controller node managing the
0045 local resets for this device, and a reset specifier.
0046 maxItems: 1
0047
0048 firmware-name:
0049 description: |
0050 Should contain the name of the default firmware image
0051 file located on the firmware search path
0052
0053 mboxes:
0054 description: |
0055 OMAP Mailbox specifier denoting the sub-mailbox, to be used for
0056 communication with the remote processor. This property should match
0057 with the sub-mailbox node used in the firmware image.
0058 maxItems: 1
0059
0060 memory-region:
0061 minItems: 2
0062 maxItems: 8
0063 description: |
0064 phandle to the reserved memory nodes to be associated with the remoteproc
0065 device. There should be at least two reserved memory nodes defined. The
0066 reserved memory nodes should be carveout nodes, and should be defined as
0067 per the bindings in
0068 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
0069 items:
0070 - description: region used for dynamic DMA allocations like vrings and
0071 vring buffers
0072 - description: region reserved for firmware image sections
0073 additionalItems: true
0074
0075 # Optional properties:
0076 # --------------------
0077
0078 sram:
0079 $ref: /schemas/types.yaml#/definitions/phandle-array
0080 minItems: 1
0081 maxItems: 4
0082 items:
0083 maxItems: 1
0084 description: |
0085 phandles to one or more reserved on-chip SRAM regions. The regions
0086 should be defined as child nodes of the respective SRAM node, and
0087 should be defined as per the generic bindings in,
0088 Documentation/devicetree/bindings/sram/sram.yaml
0089
0090 if:
0091 properties:
0092 compatible:
0093 enum:
0094 - ti,j721e-c66-dsp
0095 then:
0096 properties:
0097 reg:
0098 items:
0099 - description: Address and Size of the L2 SRAM internal memory region
0100 - description: Address and Size of the L1 PRAM internal memory region
0101 - description: Address and Size of the L1 DRAM internal memory region
0102 reg-names:
0103 items:
0104 - const: l2sram
0105 - const: l1pram
0106 - const: l1dram
0107 else:
0108 if:
0109 properties:
0110 compatible:
0111 enum:
0112 - ti,j721e-c71-dsp
0113 - ti,j721s2-c71-dsp
0114 then:
0115 properties:
0116 reg:
0117 items:
0118 - description: Address and Size of the L2 SRAM internal memory region
0119 - description: Address and Size of the L1 DRAM internal memory region
0120 reg-names:
0121 items:
0122 - const: l2sram
0123 - const: l1dram
0124
0125 required:
0126 - compatible
0127 - reg
0128 - reg-names
0129 - ti,sci
0130 - ti,sci-dev-id
0131 - ti,sci-proc-ids
0132 - resets
0133 - firmware-name
0134 - mboxes
0135 - memory-region
0136
0137 unevaluatedProperties: false
0138
0139 examples:
0140 - |
0141 soc {
0142 #address-cells = <2>;
0143 #size-cells = <2>;
0144
0145 mailbox0_cluster3: mailbox-0 {
0146 #mbox-cells = <1>;
0147 };
0148
0149 mailbox0_cluster4: mailbox-1 {
0150 #mbox-cells = <1>;
0151 };
0152
0153 bus@100000 {
0154 compatible = "simple-bus";
0155 #address-cells = <2>;
0156 #size-cells = <2>;
0157 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
0158 <0x00 0x64800000 0x00 0x64800000 0x00 0x00800000>, /* C71_0 */
0159 <0x4d 0x80800000 0x4d 0x80800000 0x00 0x00800000>, /* C66_0 */
0160 <0x4d 0x81800000 0x4d 0x81800000 0x00 0x00800000>; /* C66_1 */
0161
0162 /* J721E C66_0 DSP node */
0163 dsp@4d80800000 {
0164 compatible = "ti,j721e-c66-dsp";
0165 reg = <0x4d 0x80800000 0x00 0x00048000>,
0166 <0x4d 0x80e00000 0x00 0x00008000>,
0167 <0x4d 0x80f00000 0x00 0x00008000>;
0168 reg-names = "l2sram", "l1pram", "l1dram";
0169 ti,sci = <&dmsc>;
0170 ti,sci-dev-id = <142>;
0171 ti,sci-proc-ids = <0x03 0xFF>;
0172 resets = <&k3_reset 142 1>;
0173 firmware-name = "j7-c66_0-fw";
0174 memory-region = <&c66_0_dma_memory_region>,
0175 <&c66_0_memory_region>;
0176 mboxes = <&mailbox0_cluster3 &mbox_c66_0>;
0177 };
0178
0179 /* J721E C71_0 DSP node */
0180 c71_0: dsp@64800000 {
0181 compatible = "ti,j721e-c71-dsp";
0182 reg = <0x00 0x64800000 0x00 0x00080000>,
0183 <0x00 0x64e00000 0x00 0x0000c000>;
0184 reg-names = "l2sram", "l1dram";
0185 ti,sci = <&dmsc>;
0186 ti,sci-dev-id = <15>;
0187 ti,sci-proc-ids = <0x30 0xFF>;
0188 resets = <&k3_reset 15 1>;
0189 firmware-name = "j7-c71_0-fw";
0190 memory-region = <&c71_0_dma_memory_region>,
0191 <&c71_0_memory_region>;
0192 mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
0193 };
0194 };
0195 };
