0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-mss-pil.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Qualcomm SC7280 MSS Peripheral Image Loader
0008
0009 maintainers:
0010 - Sibi Sankar <quic_sibis@quicinc.com>
0011
0012 description:
0013 This document describes the hardware for a component that loads and boots firmware
0014 on the Qualcomm Technology Inc. SC7280 Modem Hexagon Core.
0015
0016 properties:
0017 compatible:
0018 enum:
0019 - qcom,sc7280-mss-pil
0020
0021 reg:
0022 items:
0023 - description: MSS QDSP6 registers
0024 - description: RMB registers
0025
0026 reg-names:
0027 items:
0028 - const: qdsp6
0029 - const: rmb
0030
0031 iommus:
0032 items:
0033 - description: MSA Stream 1
0034 - description: MSA Stream 2
0035
0036 interconnects:
0037 items:
0038 - description: Path leading to system memory
0039
0040 interrupts:
0041 items:
0042 - description: Watchdog interrupt
0043 - description: Fatal interrupt
0044 - description: Ready interrupt
0045 - description: Handover interrupt
0046 - description: Stop acknowledge interrupt
0047 - description: Shutdown acknowledge interrupt
0048
0049 interrupt-names:
0050 items:
0051 - const: wdog
0052 - const: fatal
0053 - const: ready
0054 - const: handover
0055 - const: stop-ack
0056 - const: shutdown-ack
0057
0058 clocks:
0059 items:
0060 - description: GCC MSS IFACE clock
0061 - description: GCC MSS OFFLINE clock
0062 - description: GCC MSS SNOC_AXI clock
0063 - description: RPMH PKA clock
0064 - description: RPMH XO clock
0065
0066 clock-names:
0067 items:
0068 - const: iface
0069 - const: offline
0070 - const: snoc_axi
0071 - const: pka
0072 - const: xo
0073
0074 power-domains:
0075 items:
0076 - description: CX power domain
0077 - description: MSS power domain
0078
0079 power-domain-names:
0080 items:
0081 - const: cx
0082 - const: mss
0083
0084 resets:
0085 items:
0086 - description: AOSS restart
0087 - description: PDC reset
0088
0089 reset-names:
0090 items:
0091 - const: mss_restart
0092 - const: pdc_reset
0093
0094 memory-region:
0095 items:
0096 - description: MBA reserved region
0097 - description: modem reserved region
0098
0099 firmware-name:
0100 $ref: /schemas/types.yaml#/definitions/string-array
0101 items:
0102 - description: Name of MBA firmware
0103 - description: Name of modem firmware
0104
0105 qcom,halt-regs:
0106 $ref: /schemas/types.yaml#/definitions/phandle-array
0107 description:
0108 Halt registers are used to halt transactions of various sub-components
0109 within MSS.
0110 items:
0111 - items:
0112 - description: phandle to TCSR_MUTEX registers
0113 - description: offset to the Q6 halt register
0114 - description: offset to the modem halt register
0115 - description: offset to the nc halt register
0116 - description: offset to the vq6 halt register
0117
0118 qcom,ext-regs:
0119 $ref: /schemas/types.yaml#/definitions/phandle-array
0120 description: EXT registers are used for various power related functionality
0121 items:
0122 - items:
0123 - description: phandle to TCSR_REG registers
0124 - description: offset to the force_clk_en register
0125 - description: offset to the rscc_disable register
0126 - items:
0127 - description: phandle to TCSR_MUTEX registers
0128 - description: offset to the axim1_clk_off register
0129 - description: offset to the crypto_clk_off register
0130
0131 qcom,qaccept-regs:
0132 $ref: /schemas/types.yaml#/definitions/phandle-array
0133 description: QACCEPT registers are used to bring up/down Q-channels
0134 items:
0135 - items:
0136 - description: phandle to TCSR_MUTEX registers
0137 - description: offset to the mdm qaccept register
0138 - description: offset to the cx qaccept register
0139 - description: offset to the axi qaccept register
0140
0141 qcom,qmp:
0142 $ref: /schemas/types.yaml#/definitions/phandle
0143 description: Reference to the AOSS side-channel message RAM.
0144
0145 qcom,smem-states:
0146 $ref: /schemas/types.yaml#/definitions/phandle-array
0147 description: States used by the AP to signal the Hexagon core
0148 items:
0149 - description: Stop the modem
0150
0151 qcom,smem-state-names:
0152 description: The names of the state bits used for SMP2P output
0153 const: stop
0154
0155 glink-edge:
0156 $ref: qcom,glink-edge.yaml#
0157 description:
0158 Qualcomm G-Link subnode which represents communication edge, channels
0159 and devices related to the DSP.
0160
0161 properties:
0162 interrupts:
0163 items:
0164 - description: IRQ from MSS to GLINK
0165
0166 mboxes:
0167 items:
0168 - description: Mailbox for communication between APPS and MSS
0169
0170 label:
0171 const: modem
0172
0173 apr: false
0174 fastrpc: false
0175
0176 required:
0177 - compatible
0178 - reg
0179 - reg-names
0180 - iommus
0181 - interconnects
0182 - interrupts
0183 - interrupt-names
0184 - clocks
0185 - clock-names
0186 - power-domains
0187 - power-domain-names
0188 - resets
0189 - reset-names
0190 - qcom,halt-regs
0191 - qcom,ext-regs
0192 - qcom,qaccept-regs
0193 - memory-region
0194 - qcom,qmp
0195 - qcom,smem-states
0196 - qcom,smem-state-names
0197 - glink-edge
0198
0199 additionalProperties: false
0200
0201 examples:
0202 - |
0203 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
0204 #include <dt-bindings/clock/qcom,rpmh.h>
0205 #include <dt-bindings/interconnect/qcom,sc7280.h>
0206 #include <dt-bindings/interrupt-controller/arm-gic.h>
0207 #include <dt-bindings/mailbox/qcom-ipcc.h>
0208 #include <dt-bindings/power/qcom-rpmpd.h>
0209 #include <dt-bindings/reset/qcom,sdm845-aoss.h>
0210 #include <dt-bindings/reset/qcom,sdm845-pdc.h>
0211
0212 remoteproc_mpss: remoteproc@4080000 {
0213 compatible = "qcom,sc7280-mss-pil";
0214 reg = <0x04080000 0x10000>, <0x04180000 0x48>;
0215 reg-names = "qdsp6", "rmb";
0216
0217 iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>;
0218
0219 interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>;
0220
0221 interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
0222 <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
0223 <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
0224 <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
0225 <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
0226 <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
0227
0228 interrupt-names = "wdog", "fatal", "ready", "handover",
0229 "stop-ack", "shutdown-ack";
0230
0231 clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
0232 <&gcc GCC_MSS_OFFLINE_AXI_CLK>,
0233 <&gcc GCC_MSS_SNOC_AXI_CLK>,
0234 <&rpmhcc RPMH_PKA_CLK>,
0235 <&rpmhcc RPMH_CXO_CLK>;
0236 clock-names = "iface", "offline", "snoc_axi", "pka", "xo";
0237
0238 power-domains = <&rpmhpd SC7280_CX>,
0239 <&rpmhpd SC7280_MSS>;
0240 power-domain-names = "cx", "mss";
0241
0242 memory-region = <&mba_mem>, <&mpss_mem>;
0243
0244 qcom,qmp = <&aoss_qmp>;
0245
0246 qcom,smem-states = <&modem_smp2p_out 0>;
0247 qcom,smem-state-names = "stop";
0248
0249 resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
0250 <&pdc_reset PDC_MODEM_SYNC_RESET>;
0251 reset-names = "mss_restart", "pdc_reset";
0252
0253 qcom,halt-regs = <&tcsr_mutex 0x23000 0x25000 0x28000 0x33000>;
0254 qcom,ext-regs = <&tcsr 0x10000 0x10004>, <&tcsr_mutex 0x26004 0x26008>;
0255 qcom,qaccept-regs = <&tcsr_mutex 0x23030 0x23040 0x23020>;
0256
0257 glink-edge {
0258 interrupts-extended = <&ipcc IPCC_CLIENT_MPSS
0259 IPCC_MPROC_SIGNAL_GLINK_QMP
0260 IRQ_TYPE_EDGE_RISING>;
0261 mboxes = <&ipcc IPCC_CLIENT_MPSS
0262 IPCC_MPROC_SIGNAL_GLINK_QMP>;
0263 label = "modem";
0264 qcom,remote-pid = <1>;
0265 };
0266 };
