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0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7180-mss-pil.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: Qualcomm SC7180 MSS Peripheral Image Loader
0008 
0009 maintainers:
0010   - Sibi Sankar <quic_sibis@quicinc.com>
0011 
0012 description:
0013   This document describes the hardware for a component that loads and boots firmware
0014   on the Qualcomm Technology Inc. SC7180 Modem Hexagon Core.
0015 
0016 properties:
0017   compatible:
0018     enum:
0019       - qcom,sc7180-mss-pil
0020 
0021   reg:
0022     items:
0023       - description: MSS QDSP6 registers
0024       - description: RMB registers
0025 
0026   reg-names:
0027     items:
0028       - const: qdsp6
0029       - const: rmb
0030 
0031   iommus:
0032     items:
0033       - description: MSA Stream 1
0034       - description: MSA Stream 2
0035 
0036   interrupts:
0037     items:
0038       - description: Watchdog interrupt
0039       - description: Fatal interrupt
0040       - description: Ready interrupt
0041       - description: Handover interrupt
0042       - description: Stop acknowledge interrupt
0043       - description: Shutdown acknowledge interrupt
0044 
0045   interrupt-names:
0046     items:
0047       - const: wdog
0048       - const: fatal
0049       - const: ready
0050       - const: handover
0051       - const: stop-ack
0052       - const: shutdown-ack
0053 
0054   clocks:
0055     items:
0056       - description: GCC MSS IFACE clock
0057       - description: GCC MSS BUS clock
0058       - description: GCC MSS NAV clock
0059       - description: GCC MSS SNOC_AXI clock
0060       - description: GCC MSS MFAB_AXIS clock
0061       - description: RPMH XO clock
0062 
0063   clock-names:
0064     items:
0065       - const: iface
0066       - const: bus
0067       - const: nav
0068       - const: snoc_axi
0069       - const: mnoc_axi
0070       - const: xo
0071 
0072   power-domains:
0073     items:
0074       - description: CX power domain
0075       - description: MX power domain
0076       - description: MSS power domain
0077 
0078   power-domain-names:
0079     items:
0080       - const: cx
0081       - const: mx
0082       - const: mss
0083 
0084   resets:
0085     items:
0086       - description: AOSS restart
0087       - description: PDC reset
0088 
0089   reset-names:
0090     items:
0091       - const: mss_restart
0092       - const: pdc_reset
0093 
0094   memory-region:
0095     items:
0096       - description: MBA reserved region
0097       - description: modem reserved region
0098 
0099   firmware-name:
0100     $ref: /schemas/types.yaml#/definitions/string-array
0101     items:
0102       - description: Name of MBA firmware
0103       - description: Name of modem firmware
0104 
0105   qcom,halt-regs:
0106     $ref: /schemas/types.yaml#/definitions/phandle-array
0107     description:
0108       Halt registers are used to halt transactions of various sub-components
0109       within MSS.
0110     items:
0111       - items:
0112           - description: phandle to TCSR_MUTEX registers
0113           - description: offset to the Q6 halt register
0114           - description: offset to the modem halt register
0115           - description: offset to the nc halt register
0116 
0117   qcom,spare-regs:
0118     $ref: /schemas/types.yaml#/definitions/phandle-array
0119     description:
0120       Spare registers are multipurpose registers used for errata
0121       handling.
0122     items:
0123       - items:
0124           - description: phandle to TCSR_MUTEX registers
0125           - description: offset to the conn_box_spare0 register
0126 
0127   qcom,qmp:
0128     $ref: /schemas/types.yaml#/definitions/phandle
0129     description: Reference to the AOSS side-channel message RAM.
0130 
0131   qcom,smem-states:
0132     $ref: /schemas/types.yaml#/definitions/phandle-array
0133     description: States used by the AP to signal the Hexagon core
0134     items:
0135       - description: Stop the modem
0136 
0137   qcom,smem-state-names:
0138     description: The names of the state bits used for SMP2P output
0139     const: stop
0140 
0141   glink-edge:
0142     $ref: qcom,glink-edge.yaml#
0143     description:
0144       Qualcomm G-Link subnode which represents communication edge, channels
0145       and devices related to the DSP.
0146 
0147     properties:
0148       interrupts:
0149         items:
0150           - description: IRQ from MSS to GLINK
0151 
0152       mboxes:
0153         items:
0154           - description: Mailbox for communication between APPS and MSS
0155 
0156       label:
0157         const: modem
0158 
0159       apr: false
0160       fastrpc: false
0161 
0162 required:
0163   - compatible
0164   - reg
0165   - reg-names
0166   - iommus
0167   - interrupts
0168   - interrupt-names
0169   - clocks
0170   - clock-names
0171   - power-domains
0172   - power-domain-names
0173   - resets
0174   - reset-names
0175   - qcom,halt-regs
0176   - qcom,spare-regs
0177   - memory-region
0178   - qcom,qmp
0179   - qcom,smem-states
0180   - qcom,smem-state-names
0181   - glink-edge
0182 
0183 additionalProperties: false
0184 
0185 examples:
0186   - |
0187     #include <dt-bindings/clock/qcom,gcc-sc7180.h>
0188     #include <dt-bindings/clock/qcom,rpmh.h>
0189     #include <dt-bindings/interrupt-controller/arm-gic.h>
0190     #include <dt-bindings/power/qcom-rpmpd.h>
0191     #include <dt-bindings/reset/qcom,sdm845-aoss.h>
0192     #include <dt-bindings/reset/qcom,sdm845-pdc.h>
0193 
0194     remoteproc_mpss: remoteproc@4080000 {
0195         compatible = "qcom,sc7180-mss-pil";
0196         reg = <0x04080000 0x10000>, <0x04180000 0x48>;
0197         reg-names = "qdsp6", "rmb";
0198 
0199         iommus = <&apps_smmu 0x461 0x0>, <&apps_smmu 0x444 0x3>;
0200 
0201         interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
0202                               <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
0203                               <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
0204                               <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
0205                               <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
0206                               <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
0207 
0208         interrupt-names = "wdog", "fatal", "ready", "handover",
0209                           "stop-ack", "shutdown-ack";
0210 
0211         clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
0212                  <&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,
0213                  <&gcc GCC_MSS_NAV_AXI_CLK>,
0214                  <&gcc GCC_MSS_SNOC_AXI_CLK>,
0215                  <&gcc GCC_MSS_MFAB_AXIS_CLK>,
0216                  <&rpmhcc RPMH_CXO_CLK>;
0217         clock-names = "iface", "bus", "nav", "snoc_axi",
0218                       "mnoc_axi", "xo";
0219 
0220         power-domains = <&rpmhpd SC7180_CX>,
0221                         <&rpmhpd SC7180_MX>,
0222                         <&rpmhpd SC7180_MSS>;
0223         power-domain-names = "cx", "mx", "mss";
0224 
0225         memory-region = <&mba_mem>, <&mpss_mem>;
0226 
0227         qcom,qmp = <&aoss_qmp>;
0228 
0229         qcom,smem-states = <&modem_smp2p_out 0>;
0230         qcom,smem-state-names = "stop";
0231 
0232         resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
0233                  <&pdc_reset PDC_MODEM_SYNC_RESET>;
0234         reset-names = "mss_restart", "pdc_reset";
0235 
0236         qcom,halt-regs = <&tcsr_mutex_regs 0x23000 0x25000 0x24000>;
0237         qcom,spare-regs = <&tcsr_regs 0xb3e4>;
0238 
0239         glink-edge {
0240             interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>;
0241             mboxes = <&apss_shared 12>;
0242             qcom,remote-pid = <1>;
0243             label = "modem";
0244         };
0245     };