0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/pwm/renesas,pwm-rcar.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Renesas R-Car PWM Timer Controller
0008
0009 maintainers:
0010 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
0011
0012 properties:
0013 compatible:
0014 items:
0015 - enum:
0016 - renesas,pwm-r8a7742 # RZ/G1H
0017 - renesas,pwm-r8a7743 # RZ/G1M
0018 - renesas,pwm-r8a7744 # RZ/G1N
0019 - renesas,pwm-r8a7745 # RZ/G1E
0020 - renesas,pwm-r8a77470 # RZ/G1C
0021 - renesas,pwm-r8a774a1 # RZ/G2M
0022 - renesas,pwm-r8a774b1 # RZ/G2N
0023 - renesas,pwm-r8a774c0 # RZ/G2E
0024 - renesas,pwm-r8a774e1 # RZ/G2H
0025 - renesas,pwm-r8a7778 # R-Car M1A
0026 - renesas,pwm-r8a7779 # R-Car H1
0027 - renesas,pwm-r8a7790 # R-Car H2
0028 - renesas,pwm-r8a7791 # R-Car M2-W
0029 - renesas,pwm-r8a7794 # R-Car E2
0030 - renesas,pwm-r8a7795 # R-Car H3
0031 - renesas,pwm-r8a7796 # R-Car M3-W
0032 - renesas,pwm-r8a77961 # R-Car M3-W+
0033 - renesas,pwm-r8a77965 # R-Car M3-N
0034 - renesas,pwm-r8a77970 # R-Car V3M
0035 - renesas,pwm-r8a77980 # R-Car V3H
0036 - renesas,pwm-r8a77990 # R-Car E3
0037 - renesas,pwm-r8a77995 # R-Car D3
0038 - const: renesas,pwm-rcar
0039
0040 reg:
0041 # base address and length of the registers block for the PWM.
0042 maxItems: 1
0043
0044 '#pwm-cells':
0045 # should be 2. See pwm.yaml in this directory for a description of
0046 # the cells format.
0047 const: 2
0048
0049 clocks:
0050 # clock phandle and specifier pair.
0051 maxItems: 1
0052
0053 power-domains:
0054 maxItems: 1
0055
0056 resets:
0057 maxItems: 1
0058
0059 required:
0060 - compatible
0061 - reg
0062 - clocks
0063 - power-domains
0064
0065 allOf:
0066 - $ref: pwm.yaml#
0067
0068 - if:
0069 not:
0070 properties:
0071 compatible:
0072 contains:
0073 enum:
0074 - renesas,pwm-r8a7778
0075 - renesas,pwm-r8a7779
0076 then:
0077 required:
0078 - resets
0079
0080 additionalProperties: false
0081
0082 examples:
0083 - |
0084 #include <dt-bindings/clock/r8a7743-cpg-mssr.h>
0085 #include <dt-bindings/power/r8a7743-sysc.h>
0086
0087 pwm0: pwm@e6e30000 {
0088 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
0089 reg = <0xe6e30000 0x8>;
0090 clocks = <&cpg CPG_MOD 523>;
0091 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
0092 resets = <&cpg 523>;
0093 #pwm-cells = <2>;
0094 pinctrl-0 = <&pwm0_pins>;
0095 pinctrl-names = "default";
0096 };
