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OSCL-LXR

 
 

    


0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/pwm/pwm-tiehrpwm.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: TI SOC EHRPWM based PWM controller
0008 
0009 maintainers:
0010   - Vignesh R <vigneshr@ti.com>
0011 
0012 allOf:
0013   - $ref: pwm.yaml#
0014 
0015 properties:
0016   compatible:
0017     oneOf:
0018       - const: ti,am3352-ehrpwm
0019       - items:
0020           - enum:
0021               - ti,da850-ehrpwm
0022               - ti,am4372-ehrpwm
0023               - ti,dra746-ehrpwm
0024               - ti,am654-ehrpwm
0025               - ti,am64-epwm
0026           - const: ti,am3352-ehrpwm
0027 
0028   reg:
0029     maxItems: 1
0030 
0031   "#pwm-cells":
0032     const: 3
0033     description: |
0034       See pwm.yaml in this directory for a description of the cells format.
0035       The only third cell flag supported by this binding is PWM_POLARITY_INVERTED.
0036 
0037   clock-names:
0038     items:
0039       - const: tbclk
0040       - const: fck
0041 
0042   clocks:
0043     maxItems: 2
0044 
0045   power-domains:
0046     maxItems: 1
0047 
0048 required:
0049   - compatible
0050   - reg
0051   - clocks
0052   - clock-names
0053 
0054 additionalProperties: false
0055 
0056 examples:
0057   - |
0058     ehrpwm0: pwm@48300200 { /* EHRPWM on am33xx */
0059         compatible = "ti,am3352-ehrpwm";
0060         #pwm-cells = <3>;
0061         reg = <0x48300200 0x100>;
0062         clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
0063         clock-names = "tbclk", "fck";
0064     };