0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 # Copyright (C) 2020 SiFive, Inc.
0003 %YAML 1.2
0004 ---
0005 $id: http://devicetree.org/schemas/pwm/pwm-sifive.yaml#
0006 $schema: http://devicetree.org/meta-schemas/core.yaml#
0007
0008 title: SiFive PWM controller
0009
0010 maintainers:
0011 - Sagar Kadam <sagar.kadam@sifive.com>
0012 - Paul Walmsley <paul.walmsley@sifive.com>
0013
0014 description:
0015 Unlike most other PWM controllers, the SiFive PWM controller currently
0016 only supports one period for all channels in the PWM. All PWMs need to
0017 run at the same period. The period also has significant restrictions on
0018 the values it can achieve, which the driver rounds to the nearest
0019 achievable period. PWM RTL that corresponds to the IP block version
0020 numbers can be found here -
0021
0022 https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm
0023
0024 allOf:
0025 - $ref: pwm.yaml#
0026
0027 properties:
0028 compatible:
0029 items:
0030 - enum:
0031 - sifive,fu540-c000-pwm
0032 - sifive,fu740-c000-pwm
0033 - const: sifive,pwm0
0034 description:
0035 Should be "sifive,<chip>-pwm" and "sifive,pwm<version>". Supported
0036 compatible strings are "sifive,fu540-c000-pwm" and
0037 "sifive,fu740-c000-pwm" for the SiFive PWM v0 as integrated onto the
0038 SiFive FU540 and FU740 chip respectively, and "sifive,pwm0" for the
0039 SiFive PWM v0 IP block with no chip integration tweaks.
0040 Please refer to sifive-blocks-ip-versioning.txt for details.
0041
0042 reg:
0043 maxItems: 1
0044
0045 clocks:
0046 maxItems: 1
0047
0048 "#pwm-cells":
0049 const: 3
0050
0051 interrupts:
0052 maxItems: 4
0053 description:
0054 Each PWM instance in FU540-C000 has 4 comparators. One interrupt per comparator.
0055
0056 required:
0057 - compatible
0058 - reg
0059 - clocks
0060 - interrupts
0061
0062 additionalProperties: false
0063
0064 examples:
0065 - |
0066 pwm: pwm@10020000 {
0067 compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
0068 reg = <0x10020000 0x1000>;
0069 clocks = <&tlclk>;
0070 interrupt-parent = <&plic>;
0071 interrupts = <42>, <43>, <44>, <45>;
0072 #pwm-cells = <3>;
0073 };
