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0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/pwm/pwm-samsung.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: Samsung SoC PWM timers
0008 
0009 maintainers:
0010   - Thierry Reding <thierry.reding@gmail.com>
0011   - Krzysztof Kozlowski <krzk@kernel.org>
0012 
0013 description: |+
0014   Samsung SoCs contain PWM timer blocks which can be used for system clock source
0015   and clock event timers, as well as to drive SoC outputs with PWM signal. Each
0016   PWM timer block provides 5 PWM channels (not all of them can drive physical
0017   outputs - see SoC and board manual).
0018 
0019   Be aware that the clocksource driver supports only uniprocessor systems.
0020 
0021 properties:
0022   compatible:
0023     enum:
0024       - samsung,s3c2410-pwm             # 16-bit, S3C24xx
0025       - samsung,s3c6400-pwm             # 32-bit, S3C64xx
0026       - samsung,s5p6440-pwm             # 32-bit, S5P64x0
0027       - samsung,s5pc100-pwm             # 32-bit, S5PC100, S5PV210, Exynos4210 rev0 SoCs
0028       - samsung,exynos4210-pwm          # 32-bit, Exynos
0029 
0030   reg:
0031     maxItems: 1
0032 
0033   clocks:
0034     minItems: 1
0035     maxItems: 3
0036 
0037   clock-names:
0038     description: |
0039       Should contain all following required clock names:
0040       - "timers" - PWM base clock used to generate PWM signals,
0041       and any subset of following optional clock names:
0042       - "pwm-tclk0" - first external PWM clock source,
0043       - "pwm-tclk1" - second external PWM clock source.
0044       Note that not all IP variants allow using all external clock sources.
0045       Refer to SoC documentation to learn which clock source configurations
0046       are available.
0047     oneOf:
0048       - items:
0049           - const: timers
0050       - items:
0051           - const: timers
0052           - const: pwm-tclk0
0053       - items:
0054           - const: timers
0055           - const: pwm-tclk1
0056       - items:
0057           - const: timers
0058           - const: pwm-tclk0
0059           - const: pwm-tclk1
0060 
0061   interrupts:
0062     description:
0063       One interrupt per timer, starting at timer 0. Necessary only for SoCs which
0064       use PWM clocksource.
0065     minItems: 1
0066     maxItems: 5
0067 
0068   "#pwm-cells":
0069     description:
0070       The only third cell flag supported by this binding
0071       is PWM_POLARITY_INVERTED.
0072     const: 3
0073 
0074   samsung,pwm-outputs:
0075     description:
0076       A list of PWM channels used as PWM outputs on particular platform.
0077       It is an array of up to 5 elements being indices of PWM channels
0078       (from 0 to 4), the order does not matter.
0079     $ref: /schemas/types.yaml#/definitions/uint32-array
0080     uniqueItems: true
0081     items:
0082       minimum: 0
0083       maximum: 4
0084 
0085 required:
0086   - clocks
0087   - clock-names
0088   - compatible
0089   - reg
0090 
0091 additionalProperties: false
0092 
0093 allOf:
0094   - $ref: pwm.yaml#
0095 
0096   - if:
0097       properties:
0098         compatible:
0099           contains:
0100             enum:
0101               - samsung,s3c2410-pwm
0102               - samsung,s3c6400-pwm
0103               - samsung,s5p6440-pwm
0104               - samsung,s5pc100-pwm
0105     then:
0106       required:
0107         - interrupts
0108 
0109 examples:
0110   - |
0111     pwm@7f006000 {
0112         compatible = "samsung,s3c6400-pwm";
0113         reg = <0x7f006000 0x1000>;
0114         interrupt-parent = <&vic0>;
0115         interrupts = <23>, <24>, <25>, <27>, <28>;
0116         clocks = <&clock 67>;
0117         clock-names = "timers";
0118         samsung,pwm-outputs = <0>, <1>;
0119         #pwm-cells = <3>;
0120     };