0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/pwm/imx-pwm.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Freescale i.MX PWM controller
0008
0009 maintainers:
0010 - Philipp Zabel <p.zabel@pengutronix.de>
0011
0012 allOf:
0013 - $ref: pwm.yaml#
0014
0015 properties:
0016 "#pwm-cells":
0017 description: |
0018 Should be 2 for i.MX1 and 3 for i.MX27 and newer SoCs. See pwm.yaml
0019 in this directory for a description of the cells format.
0020 enum:
0021 - 2
0022 - 3
0023
0024 compatible:
0025 oneOf:
0026 - enum:
0027 - fsl,imx1-pwm
0028 - fsl,imx27-pwm
0029 - items:
0030 - enum:
0031 - fsl,imx25-pwm
0032 - fsl,imx31-pwm
0033 - fsl,imx50-pwm
0034 - fsl,imx51-pwm
0035 - fsl,imx53-pwm
0036 - fsl,imx6q-pwm
0037 - fsl,imx6sl-pwm
0038 - fsl,imx6sll-pwm
0039 - fsl,imx6sx-pwm
0040 - fsl,imx6ul-pwm
0041 - fsl,imx7d-pwm
0042 - fsl,imx8mm-pwm
0043 - fsl,imx8mn-pwm
0044 - fsl,imx8mp-pwm
0045 - fsl,imx8mq-pwm
0046 - const: fsl,imx27-pwm
0047
0048 reg:
0049 maxItems: 1
0050
0051 clocks:
0052 items:
0053 - description: SoC PWM ipg clock
0054 - description: SoC PWM per clock
0055
0056 clock-names:
0057 items:
0058 - const: ipg
0059 - const: per
0060
0061 interrupts:
0062 maxItems: 1
0063
0064 required:
0065 - compatible
0066 - reg
0067 - clocks
0068 - clock-names
0069 - interrupts
0070
0071 additionalProperties: false
0072
0073 examples:
0074 - |
0075 #include <dt-bindings/clock/imx5-clock.h>
0076
0077 pwm@53fb4000 {
0078 #pwm-cells = <3>;
0079 compatible = "fsl,imx27-pwm";
0080 reg = <0x53fb4000 0x4000>;
0081 clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
0082 <&clks IMX5_CLK_PWM1_HF_GATE>;
0083 clock-names = "ipg", "per";
0084 interrupts = <61>;
0085 };
