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OSCL-LXR

 
 

    


0001 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/pwm/clk-pwm.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: Clock based PWM controller
0008 
0009 maintainers:
0010   - Nikita Travkin <nikita@trvn.ru>
0011 
0012 description: |
0013   Some systems have clocks that can be exposed to external devices.
0014   (e.g. by muxing them to GPIO pins)
0015   It's often possible to control duty-cycle of such clocks which makes them
0016   suitable for generating PWM signal.
0017 
0018 allOf:
0019   - $ref: pwm.yaml#
0020 
0021 properties:
0022   compatible:
0023     const: clk-pwm
0024 
0025   clocks:
0026     description: Clock used to generate the signal.
0027     maxItems: 1
0028 
0029   "#pwm-cells":
0030     const: 2
0031 
0032 unevaluatedProperties: false
0033 
0034 required:
0035   - compatible
0036   - clocks
0037 
0038 examples:
0039   - |
0040     pwm {
0041       compatible = "clk-pwm";
0042       #pwm-cells = <2>;
0043       clocks = <&gcc 0>;
0044       pinctrl-names = "default";
0045       pinctrl-0 = <&pwm_clk_flash_default>;
0046     };