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OSCL-LXR

 
 

    


0001 Device-Tree bindings for Atmel's HLCDC (High-end LCD Controller) PWM driver
0002 
0003 The Atmel HLCDC PWM is subdevice of the HLCDC MFD device.
0004 See ../mfd/atmel-hlcdc.txt for more details.
0005 
0006 Required properties:
0007  - compatible: value should be one of the following:
0008    "atmel,hlcdc-pwm"
0009  - pinctr-names: the pin control state names. Should contain "default".
0010  - pinctrl-0: should contain the pinctrl states described by pinctrl
0011    default.
0012  - #pwm-cells: should be set to 3. This PWM chip use the default 3 cells
0013    bindings defined in pwm.yaml in this directory.
0014 
0015 Example:
0016 
0017         hlcdc: hlcdc@f0030000 {
0018                 compatible = "atmel,sama5d3-hlcdc";
0019                 reg = <0xf0030000 0x2000>;
0020                 clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
0021                 clock-names = "periph_clk","sys_clk", "slow_clk";
0022 
0023                 hlcdc_pwm: hlcdc-pwm {
0024                         compatible = "atmel,hlcdc-pwm";
0025                         pinctrl-names = "default";
0026                         pinctrl-0 = <&pinctrl_lcd_pwm>;
0027                         #pwm-cells = <3>;
0028                 };
0029         };