0001 * Freescale QorIQ 1588 timer based PTP clock
0002
0003 General Properties:
0004
0005 - compatible Should be "fsl,etsec-ptp" for eTSEC
0006 Should be "fsl,fman-ptp-timer" for DPAA FMan
0007 Should be "fsl,dpaa2-ptp" for DPAA2
0008 Should be "fsl,enetc-ptp" for ENETC
0009 - reg Offset and length of the register set for the device
0010 - interrupts There should be at least two interrupts. Some devices
0011 have as many as four PTP related interrupts.
0012
0013 Clock Properties:
0014
0015 - fsl,cksel Timer reference clock source.
0016 - fsl,tclk-period Timer reference clock period in nanoseconds.
0017 - fsl,tmr-prsc Prescaler, divides the output clock.
0018 - fsl,tmr-add Frequency compensation value.
0019 - fsl,tmr-fiper1 Fixed interval period pulse generator.
0020 - fsl,tmr-fiper2 Fixed interval period pulse generator.
0021 - fsl,tmr-fiper3 Fixed interval period pulse generator.
0022 Supported only on DPAA2 and ENETC hardware.
0023 - fsl,max-adj Maximum frequency adjustment in parts per billion.
0024 - fsl,extts-fifo The presence of this property indicates hardware
0025 support for the external trigger stamp FIFO.
0026 - little-endian The presence of this property indicates the 1588 timer
0027 IP block is little-endian mode. The default endian mode
0028 is big-endian.
0029
0030 These properties set the operational parameters for the PTP
0031 clock. You must choose these carefully for the clock to work right.
0032 Here is how to figure good values:
0033
0034 TimerOsc = selected reference clock MHz
0035 tclk_period = desired clock period nanoseconds
0036 NominalFreq = 1000 / tclk_period MHz
0037 FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
0038 tmr_add = ceil(2^32 / FreqDivRatio)
0039 OutputClock = NominalFreq / tmr_prsc MHz
0040 PulseWidth = 1 / OutputClock microseconds
0041 FiperFreq1 = desired frequency in Hz
0042 FiperDiv1 = 1000000 * OutputClock / FiperFreq1
0043 tmr_fiper1 = tmr_prsc * tclk_period * FiperDiv1 - tclk_period
0044 max_adj = 1000000000 * (FreqDivRatio - 1.0) - 1
0045
0046 The calculation for tmr_fiper2 is the same as for tmr_fiper1. The
0047 driver expects that tmr_fiper1 will be correctly set to produce a 1
0048 Pulse Per Second (PPS) signal, since this will be offered to the PPS
0049 subsystem to synchronize the Linux clock.
0050
0051 Reference clock source is determined by the value, which is holded
0052 in CKSEL bits in TMR_CTRL register. "fsl,cksel" property keeps the
0053 value, which will be directly written in those bits, that is why,
0054 according to reference manual, the next clock sources can be used:
0055
0056 For eTSEC,
0057 <0> - external high precision timer reference clock (TSEC_TMR_CLK
0058 input is used for this purpose);
0059 <1> - eTSEC system clock;
0060 <2> - eTSEC1 transmit clock;
0061 <3> - RTC clock input.
0062
0063 For DPAA FMan,
0064 <0> - external high precision timer reference clock (TMR_1588_CLK)
0065 <1> - MAC system clock (1/2 FMan clock)
0066 <2> - reserved
0067 <3> - RTC clock oscillator
0068
0069 When this attribute is not used, the IEEE 1588 timer reference clock
0070 will use the eTSEC system clock (for Gianfar) or the MAC system
0071 clock (for DPAA).
0072
0073 Example:
0074
0075 ptp_clock@24e00 {
0076 compatible = "fsl,etsec-ptp";
0077 reg = <0x24E00 0xB0>;
0078 interrupts = <12 0x8 13 0x8>;
0079 interrupt-parent = < &ipic >;
0080 fsl,cksel = <1>;
0081 fsl,tclk-period = <10>;
0082 fsl,tmr-prsc = <100>;
0083 fsl,tmr-add = <0x999999A4>;
0084 fsl,tmr-fiper1 = <0x3B9AC9F6>;
0085 fsl,tmr-fiper2 = <0x00018696>;
0086 fsl,max-adj = <659999998>;
0087 };
