0001 * Power Management Controller
0002
0003 Properties:
0004 - compatible: "fsl,<chip>-pmc".
0005
0006 "fsl,mpc8349-pmc" should be listed for any chip whose PMC is
0007 compatible. "fsl,mpc8313-pmc" should also be listed for any chip
0008 whose PMC is compatible, and implies deep-sleep capability.
0009
0010 "fsl,mpc8548-pmc" should be listed for any chip whose PMC is
0011 compatible. "fsl,mpc8536-pmc" should also be listed for any chip
0012 whose PMC is compatible, and implies deep-sleep capability.
0013
0014 "fsl,mpc8641d-pmc" should be listed for any chip whose PMC is
0015 compatible; all statements below that apply to "fsl,mpc8548-pmc" also
0016 apply to "fsl,mpc8641d-pmc".
0017
0018 Compatibility does not include bit assignments in SCCR/PMCDR/DEVDISR; these
0019 bit assignments are indicated via the sleep specifier in each device's
0020 sleep property.
0021
0022 - reg: For devices compatible with "fsl,mpc8349-pmc", the first resource
0023 is the PMC block, and the second resource is the Clock Configuration
0024 block.
0025
0026 For devices compatible with "fsl,mpc8548-pmc", the first resource
0027 is a 32-byte block beginning with DEVDISR.
0028
0029 - interrupts: For "fsl,mpc8349-pmc"-compatible devices, the first
0030 resource is the PMC block interrupt.
0031
0032 - fsl,mpc8313-wakeup-timer: For "fsl,mpc8313-pmc"-compatible devices,
0033 this is a phandle to an "fsl,gtm" node on which timer 4 can be used as
0034 a wakeup source from deep sleep.
0035
0036 Sleep specifiers:
0037
0038 fsl,mpc8349-pmc: Sleep specifiers consist of one cell. For each bit
0039 that is set in the cell, the corresponding bit in SCCR will be saved
0040 and cleared on suspend, and restored on resume. This sleep controller
0041 supports disabling and resuming devices at any time.
0042
0043 fsl,mpc8536-pmc: Sleep specifiers consist of three cells, the third of
0044 which will be ORed into PMCDR upon suspend, and cleared from PMCDR
0045 upon resume. The first two cells are as described for fsl,mpc8578-pmc.
0046 This sleep controller only supports disabling devices during system
0047 sleep, or permanently.
0048
0049 fsl,mpc8548-pmc: Sleep specifiers consist of one or two cells, the
0050 first of which will be ORed into DEVDISR (and the second into
0051 DEVDISR2, if present -- this cell should be zero or absent if the
0052 hardware does not have DEVDISR2) upon a request for permanent device
0053 disabling. This sleep controller does not support configuring devices
0054 to disable during system sleep (unless supported by another compatible
0055 match), or dynamically.
0056
0057 Example:
0058
0059 power@b00 {
0060 compatible = "fsl,mpc8313-pmc", "fsl,mpc8349-pmc";
0061 reg = <0xb00 0x100 0xa00 0x100>;
0062 interrupts = <80 8>;
0063 };
